target/riscv/tcg: sret in virtual user mode raises virtual instruction exception

[PATCH] target/riscv/tcg: sret in virtual user mode raises virtual instruction exception

Posted by Christian S. Lima 1 month, 2 weeks ago

Currently, when a `sret` is executed in virtual user mode, qemu
raise an `illegal instruction exception`, but in this case the correct
behavior is to raise a `virtual instruction exception` and the code
already contains a check to it, but it's not enough to catch. This
patch is useful to improve the correctness of the virtualization of
the risc v architecture.

Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3622

Signed-off-by: Christian S. Lima <christianslima@proton.me>
---
 target/riscv/tcg/op_helper.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/riscv/tcg/op_helper.c b/target/riscv/tcg/op_helper.c
index ba3c7da375..429a6186a7 100644
--- a/target/riscv/tcg/op_helper.c
+++ b/target/riscv/tcg/op_helper.c
@@ -293,6 +293,10 @@ target_ulong helper_sret(CPURISCVState *env)
     const privilege_mode_t src_priv = env->priv;
     const bool src_virt = env->virt_enabled;
 
+    if ((env->virt_enabled && env->priv < PRV_S) || (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR))) {
+        riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
+    }
+
     if (!(env->priv >= PRV_S)) {
         riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
     }
@@ -308,10 +312,6 @@ target_ulong helper_sret(CPURISCVState *env)
         riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
     }
 
-    if (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR)) {
-        riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
-    }
-
     mstatus = env->mstatus;
     prev_priv = get_field(mstatus, MSTATUS_SPP);
     mstatus = set_field(mstatus, MSTATUS_SIE,
-- 
2.53.0

Re: [PATCH] target/riscv/tcg: sret in virtual user mode raises virtual instruction exception

Posted by Alistair Francis 1 month, 1 week ago

On Sat, 2026-08-08 at 03:18 +0000, Christian S. Lima wrote:
> Currently, when a `sret` is executed in virtual user mode, qemu
> raise an `illegal instruction exception`, but in this case the
> correct
> behavior is to raise a `virtual instruction exception` and the code
> already contains a check to it, but it's not enough to catch. This
> patch is useful to improve the correctness of the virtualization of
> the risc v architecture.
> 
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3622
> 
> Signed-off-by: Christian S. Lima <christianslima@proton.me>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/tcg/op_helper.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/target/riscv/tcg/op_helper.c
> b/target/riscv/tcg/op_helper.c
> index ba3c7da375..429a6186a7 100644
> --- a/target/riscv/tcg/op_helper.c
> +++ b/target/riscv/tcg/op_helper.c
> @@ -293,6 +293,10 @@ target_ulong helper_sret(CPURISCVState *env)
>      const privilege_mode_t src_priv = env->priv;
>      const bool src_virt = env->virt_enabled;
>  
> +    if ((env->virt_enabled && env->priv < PRV_S) || (env-
> >virt_enabled && get_field(env->hstatus, HSTATUS_VTSR))) {
> +        riscv_raise_exception(env,
> RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
> +    }
> +
>      if (!(env->priv >= PRV_S)) {
>          riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST,
> GETPC());
>      }
> @@ -308,10 +312,6 @@ target_ulong helper_sret(CPURISCVState *env)
>          riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST,
> GETPC());
>      }
>  
> -    if (env->virt_enabled && get_field(env->hstatus, HSTATUS_VTSR))
> {
> -        riscv_raise_exception(env,
> RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
> -    }
> -
>      mstatus = env->mstatus;
>      prev_priv = get_field(mstatus, MSTATUS_SPP);
>      mstatus = set_field(mstatus, MSTATUS_SIE,