hw/char/Kconfig | 3 + hw/char/k230_uart.c | 816 +++++++++++++++++++++++++++++++++++++++++++ hw/char/meson.build | 1 + hw/riscv/k230.c | 33 +- include/hw/char/k230_uart.h | 198 +++++++++++ include/hw/riscv/k230.h | 6 +- tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++ tests/qtest/meson.build | 2 +- 8 files changed, 1559 insertions(+), 14 deletions(-)
This series adds a QEMU model for the K230 SoC DesignWare 8250-compatible
UART controller, wires it into the K230 SoC, and adds qtest coverage.
The implementation supports the registers and features required by the
Linux 8250_dw driver, providing an interactive shell over the serial port.
Signed-off-by: WX Chen <wxchen0913@gmail.com>
---
Changes in v3:
- Removed all hardwired preprocessor #if conditionals from the logic
- Added a helper for the receiver line status interrupt check
- Encapsulated CPR and UCV register values in header macros
- Replaced g_usleep() with qtest_clock_step() in the qtest
- Link to v2: https://lore.kernel.org/qemu-devel/20260725-feat-k230-uart-v2-v2-0-d5fe82c47c28@gmail.com
---
WX Chen (3):
hw/char: add K230 DW 8250-compatible UART
hw/riscv: k230: connect DW 8250 UART
tests/qtest: add K230 UART test
hw/char/Kconfig | 3 +
hw/char/k230_uart.c | 816 +++++++++++++++++++++++++++++++++++++++++++
hw/char/meson.build | 1 +
hw/riscv/k230.c | 33 +-
include/hw/char/k230_uart.h | 198 +++++++++++
include/hw/riscv/k230.h | 6 +-
tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++
tests/qtest/meson.build | 2 +-
8 files changed, 1559 insertions(+), 14 deletions(-)
---
base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0
change-id: 20260808-feat-k230-uart-v3-0ff3651d70ef
Best regards,
--
WX Chen <wxchen0913@gmail.com>
On Sat, 8 Aug 2026 at 12:02, WX Chen <wxchen0913@gmail.com> wrote: > > This series adds a QEMU model for the K230 SoC DesignWare 8250-compatible > UART controller, wires it into the K230 SoC, and adds qtest coverage. > > The implementation supports the registers and features required by the > Linux 8250_dw driver, providing an interactive shell over the serial port. This is a model for the same hardware as this patch: https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ I'm not fussed which one we end up with in the tree, but it would be good to name it generically so other machines can use it. Cheers, Joel > > Signed-off-by: WX Chen <wxchen0913@gmail.com> > --- > Changes in v3: > - Removed all hardwired preprocessor #if conditionals from the logic > - Added a helper for the receiver line status interrupt check > - Encapsulated CPR and UCV register values in header macros > - Replaced g_usleep() with qtest_clock_step() in the qtest > - Link to v2: https://lore.kernel.org/qemu-devel/20260725-feat-k230-uart-v2-v2-0-d5fe82c47c28@gmail.com > > --- > WX Chen (3): > hw/char: add K230 DW 8250-compatible UART > hw/riscv: k230: connect DW 8250 UART > tests/qtest: add K230 UART test > > hw/char/Kconfig | 3 + > hw/char/k230_uart.c | 816 +++++++++++++++++++++++++++++++++++++++++++ > hw/char/meson.build | 1 + > hw/riscv/k230.c | 33 +- > include/hw/char/k230_uart.h | 198 +++++++++++ > include/hw/riscv/k230.h | 6 +- > tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++ > tests/qtest/meson.build | 2 +- > 8 files changed, 1559 insertions(+), 14 deletions(-) > --- > base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0 > change-id: 20260808-feat-k230-uart-v3-0ff3651d70ef > > Best regards, > -- > WX Chen <wxchen0913@gmail.com> > >
On Thu, Aug 13, 2026 at 07:50:18PM +0930, Joel Stanley wrote: > On Sat, 8 Aug 2026 at 12:02, WX Chen <wxchen0913@gmail.com> wrote: > > > > This series adds a QEMU model for the K230 SoC DesignWare 8250-compatible > > UART controller, wires it into the K230 SoC, and adds qtest coverage. > > > > The implementation supports the registers and features required by the > > Linux 8250_dw driver, providing an interactive shell over the serial port. > > This is a model for the same hardware as this patch: > > https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ > > I'm not fussed which one we end up with in the tree, but it would be > good to name it generically so other machines can use it. > > Ah, I've been a bit busy lately and totally forgot to send out the next version of the milk-v duo patchset. I will probably make the changes and send it out soon. As for the dw 8250 uart part, I'm not sure if I should keep my uart patch in my series, or if I should wait for WX to respin his patchset and get it merged into the riscv tree, and then rebase my patchset on top of it? Regards, Kuan-Wei > > > > Signed-off-by: WX Chen <wxchen0913@gmail.com> > > --- > > Changes in v3: > > - Removed all hardwired preprocessor #if conditionals from the logic > > - Added a helper for the receiver line status interrupt check > > - Encapsulated CPR and UCV register values in header macros > > - Replaced g_usleep() with qtest_clock_step() in the qtest > > - Link to v2: https://lore.kernel.org/qemu-devel/20260725-feat-k230-uart-v2-v2-0-d5fe82c47c28@gmail.com > > > > --- > > WX Chen (3): > > hw/char: add K230 DW 8250-compatible UART > > hw/riscv: k230: connect DW 8250 UART > > tests/qtest: add K230 UART test > > > > hw/char/Kconfig | 3 + > > hw/char/k230_uart.c | 816 +++++++++++++++++++++++++++++++++++++++++++ > > hw/char/meson.build | 1 + > > hw/riscv/k230.c | 33 +- > > include/hw/char/k230_uart.h | 198 +++++++++++ > > include/hw/riscv/k230.h | 6 +- > > tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++ > > tests/qtest/meson.build | 2 +- > > 8 files changed, 1559 insertions(+), 14 deletions(-) > > --- > > base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0 > > change-id: 20260808-feat-k230-uart-v3-0ff3651d70ef > > > > Best regards, > > -- > > WX Chen <wxchen0913@gmail.com> > > > >
On Fri, 2026-08-14 at 19:37 +0800, Kuan-Wei Chiu wrote: > On Thu, Aug 13, 2026 at 07:50:18PM +0930, Joel Stanley wrote: > > On Sat, 8 Aug 2026 at 12:02, WX Chen <wxchen0913@gmail.com> wrote: > > > > > > This series adds a QEMU model for the K230 SoC DesignWare 8250- > > > compatible > > > UART controller, wires it into the K230 SoC, and adds qtest > > > coverage. > > > > > > The implementation supports the registers and features required > > > by the > > > Linux 8250_dw driver, providing an interactive shell over the > > > serial port. > > > > This is a model for the same hardware as this patch: > > > > https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ > > > > I'm not fussed which one we end up with in the tree, but it would > > be > > good to name it generically so other machines can use it. > > > > > Ah, I've been a bit busy lately and totally forgot to send out the > next > version of the milk-v duo patchset. I will probably make the changes > and send it out soon. > > As for the dw 8250 uart part, I'm not sure if I should keep my uart > patch in my series, or if I should wait for WX to respin his patchset > and get it merged into the riscv tree, and then rebase my patchset on > top of it? Your patch seems to have been reviewed by some more people, so it might be best to try and get https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ upstream. Then your Milk-V Duo board and the K230 UART can build from that Alistair > > Regards, > Kuan-Wei > > > > > > > Signed-off-by: WX Chen <wxchen0913@gmail.com> > > > --- > > > Changes in v3: > > > - Removed all hardwired preprocessor #if conditionals from the > > > logic > > > - Added a helper for the receiver line status interrupt check > > > - Encapsulated CPR and UCV register values in header macros > > > - Replaced g_usleep() with qtest_clock_step() in the qtest > > > - Link to v2: > > > https://lore.kernel.org/qemu-devel/20260725-feat-k230-uart-v2-v2-0-d5fe82c47c28@gmail.com > > > > > > --- > > > WX Chen (3): > > > hw/char: add K230 DW 8250-compatible UART > > > hw/riscv: k230: connect DW 8250 UART > > > tests/qtest: add K230 UART test > > > > > > hw/char/Kconfig | 3 + > > > hw/char/k230_uart.c | 816 > > > +++++++++++++++++++++++++++++++++++++++++++ > > > hw/char/meson.build | 1 + > > > hw/riscv/k230.c | 33 +- > > > include/hw/char/k230_uart.h | 198 +++++++++++ > > > include/hw/riscv/k230.h | 6 +- > > > tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++ > > > tests/qtest/meson.build | 2 +- > > > 8 files changed, 1559 insertions(+), 14 deletions(-) > > > --- > > > base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0 > > > change-id: 20260808-feat-k230-uart-v3-0ff3651d70ef > > > > > > Best regards, > > > -- > > > WX Chen <wxchen0913@gmail.com> > > > > > >
On Thu, Aug 13, 2026 at 6:21 PM Joel Stanley <joel@jms.id.au> wrote: > > On Sat, 8 Aug 2026 at 12:02, WX Chen <wxchen0913@gmail.com> wrote: > > > > This series adds a QEMU model for the K230 SoC DesignWare 8250-compatible > > UART controller, wires it into the K230 SoC, and adds qtest coverage. > > > > The implementation supports the registers and features required by the > > Linux 8250_dw driver, providing an interactive shell over the serial port. > > This is a model for the same hardware as this patch: > > https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ > > I'm not fussed which one we end up with in the tree, but it would be > good to name it generically so other machines can use it. > Agree. Hi Alistair, I suggest we drop the series from your riscv-to-apply.next tree and ask WX Chen to respin another version. The DesignWare series IP should be modeled separately instead of the SoC version to allow other machines to re-use the same DW IP. Regards, Bin
On Fri, 2026-08-14 at 14:27 +0800, Bin Meng wrote: > On Thu, Aug 13, 2026 at 6:21 PM Joel Stanley <joel@jms.id.au> wrote: > > > > On Sat, 8 Aug 2026 at 12:02, WX Chen <wxchen0913@gmail.com> wrote: > > > > > > This series adds a QEMU model for the K230 SoC DesignWare 8250- > > > compatible > > > UART controller, wires it into the K230 SoC, and adds qtest > > > coverage. > > > > > > The implementation supports the registers and features required > > > by the > > > Linux 8250_dw driver, providing an interactive shell over the > > > serial port. > > > > This is a model for the same hardware as this patch: > > > > https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ > > > > I'm not fussed which one we end up with in the tree, but it would > > be > > good to name it generically so other machines can use it. > > > > Agree. > > Hi Alistair, > > I suggest we drop the series from your riscv-to-apply.next tree and > ask WX Chen to respin another version. Done! Alistair > > The DesignWare series IP should be modeled separately instead of the > SoC version to allow other machines to re-use the same DW IP. > > Regards, > Bin
On 8/14/26 23:52, Alistair wrote: > On Fri, 2026-08-14 at 14:27 +0800, Bin Meng wrote: >> On Thu, Aug 13, 2026 at 6:21 PM Joel Stanley <joel@jms.id.au> wrote: >>> This is a model for the same hardware as this patch: >>> >>> https://lore.kernel.org/qemu-riscv/20260616190147.1286316-2-visitorckw@gmail.com/ >>> >>> I'm not fussed which one we end up with in the tree, but it would >>> be >>> good to name it generically so other machines can use it. >>> >> Agree. >> >> Hi Alistair, >> >> I suggest we drop the series from your riscv-to-apply.next tree and >> ask WX Chen to respin another version. > Done! > > Alistair Hi everyone: Agreed. The name k230_uart looks like it's specific to K230 SoC. I will check my patch again to make sure it's usable for other machines, then rename the source file and submit v4 soon. Thanks for the review and suggestions! Regards, Chen
On Sat, 2026-08-08 at 10:32 +0800, WX Chen wrote: > This series adds a QEMU model for the K230 SoC DesignWare 8250- > compatible > UART controller, wires it into the K230 SoC, and adds qtest coverage. > > The implementation supports the registers and features required by > the > Linux 8250_dw driver, providing an interactive shell over the serial > port. > > Signed-off-by: WX Chen <wxchen0913@gmail.com> > --- > Changes in v3: > - Removed all hardwired preprocessor #if conditionals from the logic > - Added a helper for the receiver line status interrupt check > - Encapsulated CPR and UCV register values in header macros > - Replaced g_usleep() with qtest_clock_step() in the qtest > - Link to v2: > https://lore.kernel.org/qemu-devel/20260725-feat-k230-uart-v2-v2-0-d5fe82c47c28@gmail.com > > --- > WX Chen (3): > hw/char: add K230 DW 8250-compatible UART > hw/riscv: k230: connect DW 8250 UART > tests/qtest: add K230 UART test Thanks! Applied to riscv-to-apply.next Alistair > > hw/char/Kconfig | 3 + > hw/char/k230_uart.c | 816 > +++++++++++++++++++++++++++++++++++++++++++ > hw/char/meson.build | 1 + > hw/riscv/k230.c | 33 +- > include/hw/char/k230_uart.h | 198 +++++++++++ > include/hw/riscv/k230.h | 6 +- > tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++ > tests/qtest/meson.build | 2 +- > 8 files changed, 1559 insertions(+), 14 deletions(-) > --- > base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0 > change-id: 20260808-feat-k230-uart-v3-0ff3651d70ef > > Best regards,
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