[PATCH 0/5] riscv: add K230 I2C controller support

Wang Zhongyu posted 5 patches 1 month, 3 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260807152830.6833-1-wzy15515798875@gmail.com
Maintainers: Chao Liu <chao.liu@processmission.com>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Paolo Bonzini <pbonzini@redhat.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Fabiano Rosas <farosas@suse.de>, Laurent Vivier <lvivier@redhat.com>
MAINTAINERS                 |    3 +
docs/system/riscv/k230.rst  |    1 +
hw/i2c/Kconfig              |    4 +
hw/i2c/k230_i2c.c           | 1083 ++++++++++++++++++++++++++
hw/i2c/meson.build          |    1 +
hw/riscv/Kconfig            |    1 +
hw/riscv/k230.c             |   36 +-
include/hw/i2c/k230_i2c.h   |   72 ++
include/hw/riscv/k230.h     |    8 +
tests/qtest/k230-i2c-test.c | 1459 +++++++++++++++++++++++++++++++++++
tests/qtest/meson.build     |    2 +-
11 files changed, 2654 insertions(+), 16 deletions(-)
create mode 100644 hw/i2c/k230_i2c.c
create mode 100644 include/hw/i2c/k230_i2c.h
create mode 100644 tests/qtest/k230-i2c-test.c
[PATCH 0/5] riscv: add K230 I2C controller support
Posted by Wang Zhongyu 1 month, 3 weeks ago
Hi all,

This series adds I2C controller support to the Kendryte K230
machine.

The first patch introduces a model of the DesignWare-based I2C
controller used by the K230. The second patch replaces the five
unimplemented I2C regions with controller instances and connects
them to the PLIC. The remaining patches add qtests for register,
reset, interrupt, abort, and transfer behavior, including transfers
with TMP105 and i2c-echo slave devices.

The model currently supports master-mode 7-bit transfers, the K230
TX and RX FIFO configuration and related register behavior,
interrupt status and masking, repeated START and STOP handling,
General Call writes, reset, and migration state.

DMA, 10-bit addressing, bus clear, Device ID transactions, and raw
START BYTE generation are not implemented.

Testing performed:

- riscv64-softmmu build
- K230 I2C qtests
- scripts/checkpatch.pl on the patch series
- K230 Linux boot and DesignWare I2C driver probe
- i2cdetect, i2cget, and i2cset transfers with an attached I2C
  slave device

Regards,
Wang Zhongyu

Wang Zhongyu (5):
  hw/i2c: add K230 I2C controller model
  hw/riscv: instantiate K230 I2C controllers
  tests/qtest: add K230 I2C controller tests
  tests/qtest: expand K230 I2C controller tests
  tests/qtest: test K230 I2C transfers with slave devices

 MAINTAINERS                 |    3 +
 docs/system/riscv/k230.rst  |    1 +
 hw/i2c/Kconfig              |    4 +
 hw/i2c/k230_i2c.c           | 1083 ++++++++++++++++++++++++++
 hw/i2c/meson.build          |    1 +
 hw/riscv/Kconfig            |    1 +
 hw/riscv/k230.c             |   36 +-
 include/hw/i2c/k230_i2c.h   |   72 ++
 include/hw/riscv/k230.h     |    8 +
 tests/qtest/k230-i2c-test.c | 1459 +++++++++++++++++++++++++++++++++++
 tests/qtest/meson.build     |    2 +-
 11 files changed, 2654 insertions(+), 16 deletions(-)
 create mode 100644 hw/i2c/k230_i2c.c
 create mode 100644 include/hw/i2c/k230_i2c.h
 create mode 100644 tests/qtest/k230-i2c-test.c

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2.43.0