target/arm: Implement FEAT_SVE_{BFSCALE,BitPerm,AES2}

[PATCH 00/20] target/arm: Implement FEAT_SVE_{BFSCALE,BitPerm,AES2}

Richard Henderson posted 20 patches 3 days, 13 hours ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260721184656.530230-1-richard.henderson@linaro.org

Maintainers: Warner Losh <imp@bsdimp.com>, Kyle Evans <kevans@freebsd.org>, Peter Maydell <peter.maydell@linaro.org>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Laurent Vivier <laurent@vivier.eu>, Helge Deller <deller@gmx.de>

bsd-user/aarch64/target_arch_elf.h |   8 +-
target/arm/cpu-features.h          |  28 ++-
target/arm/tcg/helper-a64-defs.h   |   1 +
target/arm/tcg/helper-defs.h       |   5 +
target/arm/tcg/helper-sve-defs.h   |   5 +
linux-user/aarch64/elfload.c       |  11 +-
target/arm/tcg/cpu64.c             |   6 +-
target/arm/tcg/crypto_helper.c     | 164 ++++++++++++++---
target/arm/tcg/sve_helper.c        |   1 +
target/arm/tcg/translate-sme.c     |   8 +
target/arm/tcg/translate-sve.c     | 282 +++++++++++++++++++++--------
target/arm/tcg/vec_helper64.c      |  31 ++++
docs/system/arm/emulation.rst      |   3 +
target/arm/tcg/sme.decode          |  44 ++++-
target/arm/tcg/sve.decode          |  70 ++++++-
15 files changed, 533 insertions(+), 134 deletions(-)

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[PATCH 00/20] target/arm: Implement FEAT_SVE_{BFSCALE,BitPerm,AES2}

Posted by Richard Henderson 3 days, 13 hours ago

Based-on: 20260719174905.420725-1-richard.henderson@linaro.org
("[PATCH for-11.2 0/6] target/arm: Implement FEAT_SME2p2")

I believe these are the last 3 SVE extensions present in
the ARM revision M.c.


r~


Richard Henderson (20):
  target/arm: Remove DO_ZPZZ_FP from translate-sme.c
  target/arm: Remove DO_ZPZZ_FP_B16 from translate-sme.c
  target/arm: Remove DO_ZPZZ_AH_FP from translate-sme.c
  target/arm: Remove DO_ZPZZ_AH_FP_B16 from translate-sme.c
  target/arm: Split decode of BFloat SVE FADD, FSUB, FMUL, FMIN*, FMAX*
  target/arm: Implement SVE BFSCALE
  target/arm: Implement SME BFSCALE
  target/arm: Implement SME BFMUL
  target/arm: Enable FEAT_SVE_BFSCALE for -cpu max
  target/arm: Rename isar_feature_aa64_sve_pmull128
  target/arm: Rename isar_feature_aa64_sve_bitperm
  target/arm: Rename isar_feature_aa64_sve_sha3
  target/arm: Rename isar_feature_aa64_sve_sm4
  target/arm: Implement and enable FEAT_SSVE_BitPerm for -cpu max
  target/arm: Implement AESE (indexed)
  target/arm: Implement AESD (indexed)
  target/arm: Implement AESEMC
  target/arm: Implement AESDIMC
  target/arm: Implement PMULL, PMLAL
  target/arm: Enable FEAT_SVE_AES2 for -cpu max

 bsd-user/aarch64/target_arch_elf.h |   8 +-
 target/arm/cpu-features.h          |  28 ++-
 target/arm/tcg/helper-a64-defs.h   |   1 +
 target/arm/tcg/helper-defs.h       |   5 +
 target/arm/tcg/helper-sve-defs.h   |   5 +
 linux-user/aarch64/elfload.c       |  11 +-
 target/arm/tcg/cpu64.c             |   6 +-
 target/arm/tcg/crypto_helper.c     | 164 ++++++++++++++---
 target/arm/tcg/sve_helper.c        |   1 +
 target/arm/tcg/translate-sme.c     |   8 +
 target/arm/tcg/translate-sve.c     | 282 +++++++++++++++++++++--------
 target/arm/tcg/vec_helper64.c      |  31 ++++
 docs/system/arm/emulation.rst      |   3 +
 target/arm/tcg/sme.decode          |  44 ++++-
 target/arm/tcg/sve.decode          |  70 ++++++-
 15 files changed, 533 insertions(+), 134 deletions(-)

-- 
2.43.0