hw/riscv/k230: add the K230 Reset Management Unit

[PATCH v2 0/2] hw/riscv/k230: add the K230 Reset Management Unit

Jack Wang posted 2 patches 5 days, 17 hours ago

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Failed in applying to current master (apply log)

MAINTAINERS                 |   3 +
docs/system/riscv/k230.rst  |   1 +
hw/misc/Kconfig             |   3 +
hw/misc/k230_rmu.c          | 425 ++++++++++++++++++++++++++++++++++++
hw/misc/meson.build         |   1 +
hw/misc/trace-events        |   7 +
hw/riscv/Kconfig            |   1 +
hw/riscv/k230.c             |  15 +-
include/hw/misc/k230_rmu.h  | 126 +++++++++++
include/hw/riscv/k230.h     |   2 +
tests/qtest/k230-rmu-test.c | 225 +++++++++++++++++++
tests/qtest/meson.build     |   3 +-
12 files changed, 808 insertions(+), 4 deletions(-)
create mode 100644 hw/misc/k230_rmu.c
create mode 100644 include/hw/misc/k230_rmu.h
create mode 100644 tests/qtest/k230-rmu-test.c

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[PATCH v2 0/2] hw/riscv/k230: add the K230 Reset Management Unit

Posted by Jack Wang 5 days, 17 hours ago

References: <20260709031237.21284-1-163wangjack@gmail.com>

This v2 patch reply on review of 
This series models the Kendryte K230 Reset Management Unit (RMU), a bank of
reset-control registers at 0x91101000, and wires it into the K230 SoC. It
replaces the create_unimplemented_device("rmu") stub so guest reset drivers
(drivers/reset/reset-k230.c) work against a real model.

Patch 1 adds the standalone device model; patch 2 wires it into the SoC and
adds the qtest. The qtest is deliberately placed in patch 2 accorinding to 
suggestion from Daniel: it drives "-machine k230", which only
exists once the device is wired up.

Register semantics, reset values and reserved-bit masks are taken from the
K230 TRM chapter 2.1 "Reset" (V0.3.1) and cross-checked against the mainline
Linux driver.

Changes since v1:
 - Switched to the Resettable API (phases.hold instead of the legacy
   device_class_set_legacy_reset()), per Daniel's review.
 - Model real reset propagation: the RMU now cold-resets the two linked
   watchdogs via "wdt0"/"wdt1" QOM links when their PERI0 reset bits are
   written (Cao review).
 - CPU1 reset request is now a two-step assert/deassert (not self-clearing),
   matching the hardware (Cao review ).
 - Filled in the documented per-register reset values and reserved-bit
   (writable) masks from the TRM; the *_rst_done status bits reset to 0, so
   they follow the per-bit "Reset" column rather than the summarised total.
 - Added the reset-time-control (*_RST_TIM) registers as plain storage with
   their documented reset values.
 - Fixed the storage mask so the upper half of non-write-enable registers is
   writable (surfaced by the new TIM registers).
 - New qtests: reset values, TIM storage, reserved-bit read-only, CPU1
   two-step, and real watchdog reset propagation.
 - Moved the qtest from patch 1 to patch 2 for bisectability; added the
   MAINTAINERS entries.

Jack Wang (2):
  hw/misc/k230_rmu: add Kendryte K230 Reset Management Unit model
  hw/riscv/k230: wire up the RMU device

 MAINTAINERS                 |   3 +
 docs/system/riscv/k230.rst  |   1 +
 hw/misc/Kconfig             |   3 +
 hw/misc/k230_rmu.c          | 425 ++++++++++++++++++++++++++++++++++++
 hw/misc/meson.build         |   1 +
 hw/misc/trace-events        |   7 +
 hw/riscv/Kconfig            |   1 +
 hw/riscv/k230.c             |  15 +-
 include/hw/misc/k230_rmu.h  | 126 +++++++++++
 include/hw/riscv/k230.h     |   2 +
 tests/qtest/k230-rmu-test.c | 225 +++++++++++++++++++
 tests/qtest/meson.build     |   3 +-
 12 files changed, 808 insertions(+), 4 deletions(-)
 create mode 100644 hw/misc/k230_rmu.c
 create mode 100644 include/hw/misc/k230_rmu.h
 create mode 100644 tests/qtest/k230-rmu-test.c

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2.53.0