Aarch32 TCG CPU: secure register migration

[PATCH 0/1] Aarch32 TCG CPU: secure register migration

Tao Ding posted 1 patch 1 week ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20260717174412.88258-1-dingtao0430@163.com

Maintainers: Peter Maydell <peter.maydell@linaro.org>

target/arm/cpregs.h | 11 +++++++++++
target/arm/helper.c | 14 ++++++++++++--
2 files changed, 23 insertions(+), 2 deletions(-)

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[PATCH 0/1] Aarch32 TCG CPU: secure register migration

Posted by Tao Ding 1 week ago

Hi, all

In TCG mode, the xilinx-zynq-a9 board cannot recover normally 
after migration during the uboot phase. Some secure registers 
did not recover their correct values after migration, causing 
the CPU to enter an abnormal state.

I have also submitted this issue:
https://gitlab.com/qemu-project/qemu/-/work_items/4037

In this patch, fixed the issue of aarch32 CPU secure register 
recovery.

Thanks.

Tao Ding (1):
  aarch32 cpu secure register tcg migration

 target/arm/cpregs.h | 11 +++++++++++
 target/arm/helper.c | 14 ++++++++++++--
 2 files changed, 23 insertions(+), 2 deletions(-)


base-commit: 5ef0ecc5942ee07bb581cc96a97bbfc0fdf4005c
-- 
2.43.0

Re: [PATCH 0/1] Aarch32 TCG CPU: secure register migration

Posted by Peter Maydell 1 week ago

On Fri, 17 Jul 2026 at 18:44, Tao Ding <dingtao0430@163.com> wrote:
>
> Hi, all
>
> In TCG mode, the xilinx-zynq-a9 board cannot recover normally
> after migration during the uboot phase. Some secure registers
> did not recover their correct values after migration, causing
> the CPU to enter an abnormal state.

Yes, this is a very long standing issue:
https://gitlab.com/qemu-project/qemu/-/work_items/467

Thanks for submitting this patch -- I'll have a look at it later.

-- PMM