[PATCH for-11.1 00/17] target/riscv: Nick's debug fixes for 11.1

Daniel Henrique Barboza posted 17 patches 1 week, 2 days ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260716123535.3709148-1-daniel.barboza@oss.qualcomm.com
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>
target/riscv/machine.c        |  13 +-
target/riscv/tcg/cpu_helper.c |   7 +
target/riscv/tcg/debug.c      | 326 ++++++++++++++++++++++------------
target/riscv/tcg/debug.h      |   5 +-
4 files changed, 229 insertions(+), 122 deletions(-)
[PATCH for-11.1 00/17] target/riscv: Nick's debug fixes for 11.1
Posted by Daniel Henrique Barboza 1 week, 2 days ago
Greetings,

Nick sent a RFC with several debug fixes and some new features back in
January:

https://lore.kernel.org/qemu-devel/20260114044701.1173347-1-npiggin@gmail.com/

I took all the bug fixes in that RFC, rebased and I'm now sending for
11.1 upstreaming.  All patches are fixing something that is currently
broken, with the adequate "Fixes" tag, so I'm comfortable in sending all
of them for 11.1.

Mister Chao, if you could take a quick look in these that would be
terrific (you have acked patches 1-4 already).  This is the first step
to finally upstream your sdext work.  Next step is to split debug 0.13
and 1.0 support, which I am going to do by maybe taking some of Nick's
work in that RFC, maybe with some new stuff, and then we'll add your
sdext on top of the 1.0 codebase.  This is all 11.2 business that,
hopefully, we'll get queued and ready to go as soon as the 11.2 window
opens.


All patches acked. Patches based on master.


Nicholas Piggin (17):
  target/riscv/debug: Check only mcontrol triggers for break/watchpoint
    matching
  target/riscv/debug: Handle changing trigger types
  target/riscv/debug: Implement permissive type unavailable trigger
  target/riscv/debug: Fix icount trigger privilege check
  target/riscv/debug: Update itrigger_enabled after changing privilege
  target/riscv/debug: Implement get_trigger_action for icount type
    trigger
  target/riscv/debug: Fix icount privilege matching icount_enabled()
    test
  target/riscv/debug: Implement icount trigger textra matching
  target/riscv/debug: Maintain itrigger_enabled in
    helper_itrigger_match()
  target/riscv/debug: Fix breakpoint matching action
  target/riscv/debug: Put mcontrol load/store match address into tval
  target/riscv/debug: Remove breakpoints on reset
  target/riscv/debug: Fix migration post_load icount_enabled() test
  target/riscv/debug: Insert breakpoints after migration
  target/riscv/debug: Advertise icount trigger type in tinfo
  target/riscv/debug: Reset trigger type to unavailable
  target/riscv/debug: Fix minor comment typos

 target/riscv/machine.c        |  13 +-
 target/riscv/tcg/cpu_helper.c |   7 +
 target/riscv/tcg/debug.c      | 326 ++++++++++++++++++++++------------
 target/riscv/tcg/debug.h      |   5 +-
 4 files changed, 229 insertions(+), 122 deletions(-)

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2.43.0