Hi all,
This RFC adds a QEMU device model, "xiic-fpga-i2c", for a Nexthop-style
PCIe FPGA that exposes Xilinx AXI-IIC (i2c-xiic) controllers. The goal
is to let the SONiC platform bring-up path (the multifpgapci + i2c-xiic
kernel drivers, plus the userspace platform code that walks the I2C
tree) be exercised under QEMU without access to real switch hardware.
The device presents a PCIe function with a BAR0 register window that
decodes the AXI-IIC register map, gives each channel its own QEMU I2C
bus (so standard slave models such as at24c-eeprom / tmp105 / tmp421 can
be attached from the command line), drives real transfers through the
i2c core in dynamic (DTR) mode, and delivers completion via MSI with a
legacy INTx fallback.
Open questions I would appreciate guidance on:
1. Is an emulation of a vendor-specific FPGA appropriate for hw/misc,
or would you prefer it live elsewhere / be structured differently?
It is modelled as a TEST_DEVICES-gated device alongside EDU and
pci-testdev, since its purpose is CI/bring-up rather than modelling
a shipping board.
2. The AXI-IIC register decode here is deliberately partial: it
implements the subset the Linux i2c-xiic driver actually touches in
dynamic mode. I can flesh out the static/manual mode if that is
preferred for a general-purpose model.
3. A documentation file under docs/specs/ can be added if this is
something you would consider merging; I left it out of the RFC to
keep the first posting focused on the device itself.
This series is based on current master (191489ba75). No documentation or
qtest is included yet (happy to add both if there is interest).
Thanks,
Nodoka
Nodoka Shibasaki (1):
hw/misc: add xiic-fpga-i2c, an emulated Nexthop PCIe FPGA I2C
controller
MAINTAINERS | 5 +
hw/misc/Kconfig | 6 +
hw/misc/meson.build | 1 +
hw/misc/xiic_fpga_i2c.c | 651 ++++++++++++++++++++++++++++++++++++++++
4 files changed, 663 insertions(+)
create mode 100644 hw/misc/xiic_fpga_i2c.c
--
2.50.1