Hi; here's hopefully the last pullreq for arm before softfreeze.
There's a mix here of bug fixes of various kinds plus support
for emulation of a few new CPU features.

thanks
-- PMM


The following changes since commit 4ee536fac748b70e6f3d8568ddd20cfbaa9cf7bf:

  Merge tag 'firmware-20260704-pull-request' of https://gitlab.com/kraxel/qemu into staging (2026-07-05 08:42:47 +0200)

are available in the Git repository at:

  https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260706

for you to fetch changes up to 3455eac92d3e4b70bc222d98268f092efd4f1934:

  target/arm: Define fields for NSACR (2026-07-06 11:32:01 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/net/fsl_etsec: validate FCB offsets in process_tx_fcb()
 * hw/arm/smmuv3-accel: Fix veventq read returning true on EAGAIN/EINTR
 * target/arm: Only evaluate SCR_EL3.PIEN if ARM_FEATURE_EL3 is present
 * hw/arm: use cortex-a9 mpcore base for CBAR on npcm7xx machines
 * docs/specs/fw_cfg: Document all architecture register layouts
 * hw/nvram/fw_cfg: Simplify functions so board models don't have
   the opportunity to create non-standard fw_cfg register layouts
 * hw/misc: use tracepoints rather than DPRINTF in imx ccm models
 * hw/arm: add support for shim loading
 * docs/system/arm: Document Zynq Buildroot boot
 * target/arm: Report correct syndrome to AArch32 EL2 for trapped
   Neon/VFP insns
 * target/arm: implement WFET to not be a NOP
 * target/arm: Emulate FEAT_SME_MOP4
 * target/arm: Emulate FEAT_FPRCVT
 * target/arm: Emulate FEAT_SSVE_FEXPA

----------------------------------------------------------------
Alex Bennée (7):
      hw/arm: use cortex-a9 mpcore base for CBAR on npcm7xx machines
      tests/functional: update anacapa-bmc image
      target/arm: do not clear halting reason in has_work helper
      target/arm: ensure we create the wxft_timer for all modes
      target/arm: implements SEV/SEVL for all modes
      target/arm: enable WFE sleeping for A-profile
      target/arm: implement WFET

Bin Meng (1):
      docs/system/arm: Document Zynq Buildroot boot

Feifan Qian (1):
      hw/net/fsl_etsec: validate FCB offsets in process_tx_fcb()

Gerd Hoffmann (3):
      hw/nvram: add load_image_to_fw_cfg_file()
      hw/i386: switch shim loading to load_image_to_fw_cfg_file
      hw/arm: add support for shim loading

Jason Wright (1):
      target/arm/hvf: seed NO_RAW ID registers from isar.idregs[] on vCPU init

Jim MacArthur (6):
      target/arm/tcg: Implement new instructions for FPRCVT
      target/arm/tcg: Allow vector FP conversions with FPRCVT
      target/arm/tcg/cpu64.c: Add FEAT_FPRCVT to cpu_max
      linux-user/aarch64/elfload.c: Add FPRCVT
      docs/system/arm: Add FEAT_FPRCVT to A-profile support
      tests/tcg/arm: Tests for new FPRCVT instructions

Oliver Upton (1):
      target/arm: Only evaluate SCR_EL3.PIEN if ARM_FEATURE_EL3 is present

Peter Maydell (10):
      docs/specs/fw_cfg: Document all architecture register layouts
      hw/nvram/fw_cfg: Enforce standard layout for fw_cfg_init_mem_dma()
      hw/nvram/fw_cfg: Enforce standard layout for x86 fw_cfg I/O ports
      hw/nvram/fw_cfg: Remove support for I/O port fw_cfg without DMA
      hw/nvram/fw_cfg: Document fw_cfg_init_mem_nodma()
      hw/misc/imx31_ccm: Replace DPRINTF with trace events
      target/arm: Separate out Neon from VFP access checks
      target/arm: Separate syndrome functions for A32 and A64
      target/arm: Report correct syndrome to AArch32 EL2 for trapped Neon/VFP insns
      target/arm: Define fields for NSACR

Richard Henderson (16):
      target/arm: Implement and enable FEAT_SSVE_FEXPA for -cpu max
      target/arm: Implement FMOP4 (non-widening) for float32
      target/arm: Implement FMOP4 (non-widening) for float16
      target/arm: Implement FMOP4 (non-widening) for float64
      target/arm: Implement BFMOP4 (non-widening)
      target/arm: Implement BFMOP4 (widening)
      target/arm: Implement FMOP4 (widening, 2-way fp16 to fp32)
      target/arm: Implement FMOP4 (widening, 4-way fp8 to fp32)
      target/arm: Implement FMOP4A (widening, 2-way, FP8 to FP16)
      target/arm: Implement SMOP4[AS] (2-way)
      target/arm: Implement SMOP4[AS] (4-way)
      target/arm: Implement SUMOP4[AS]
      target/arm: Implement UMOP4[AS] (2-way)
      target/arm: Implement UMOP4[AS] (4-way)
      target/arm: Implement USMOP4[AS]
      target/arm: Enable FEAT_SME_MOP4 for -cpu max

Shameer Kolothum (1):
      hw/arm/smmuv3-accel: Fix veventq read returning true on EAGAIN/EINTR

jack wang (2):
      hw/misc/imx_ccm: Replace DPRINTF with trace events
      hw/misc/imx25_ccm: Replace DPRINTF with trace events

 docs/specs/fw_cfg.rst                       |  28 +-
 docs/system/arm/emulation.rst               |   3 +
 docs/system/arm/xlnx-zynq.rst               |  54 +++-
 hw/arm/boot.c                               |   6 +
 hw/arm/npcm7xx.c                            |   2 +-
 hw/arm/smmuv3-accel-stubs.c                 |   6 +-
 hw/arm/smmuv3-accel.c                       |  30 ++-
 hw/arm/smmuv3-accel.h                       |   4 +-
 hw/arm/tegra241-cmdqv.c                     |  11 +-
 hw/arm/virt.c                               |   2 +-
 hw/i386/fw_cfg.c                            |   3 +-
 hw/i386/microvm.c                           |   3 +-
 hw/i386/pc.c                                |   3 +-
 hw/i386/x86-common.c                        |  15 +-
 hw/loongarch/fw_cfg.c                       |   3 +-
 hw/misc/imx25_ccm.c                         |  32 +--
 hw/misc/imx31_ccm.c                         |  33 +--
 hw/misc/imx_ccm.c                           |  18 +-
 hw/misc/trace-events                        |  23 ++
 hw/net/fsl_etsec/rings.c                    |  27 +-
 hw/nvram/fw_cfg.c                           |  44 +++-
 hw/riscv/virt.c                             |   3 +-
 include/hw/arm/boot.h                       |   1 +
 include/hw/core/sysemu-cpu-ops.h            |   3 +
 include/hw/nvram/fw_cfg.h                   |  73 +++++-
 linux-user/aarch64/elfload.c                |   3 +
 target/arm/cpu-features.h                   |  45 ++++
 target/arm/cpu.c                            |  25 +-
 target/arm/cpu.h                            |   2 +-
 target/arm/helper.c                         |  10 +-
 target/arm/hvf/hvf.c                        |  10 +-
 target/arm/hvf/sysreg.c.inc                 |   2 +-
 target/arm/internals.h                      |   8 +
 target/arm/ptw.c                            |   9 +-
 target/arm/syndrome.h                       |  28 +-
 target/arm/tcg/a32.decode                   |   5 +-
 target/arm/tcg/a64.decode                   |  20 +-
 target/arm/tcg/cpu64.c                      |   3 +
 target/arm/tcg/fp8_helper.c                 |  32 +++
 target/arm/tcg/helper-defs.h                |   3 +-
 target/arm/tcg/helper-fp8-defs.h            |   3 +
 target/arm/tcg/helper-sme-defs.h            |  49 ++++
 target/arm/tcg/op_helper.c                  | 258 ++++++++++++++++--
 target/arm/tcg/sme.decode                   |  45 ++++
 target/arm/tcg/sme_helper.c                 | 390 ++++++++++++++++++++++++++++
 target/arm/tcg/t16.decode                   |   4 +-
 target/arm/tcg/t32.decode                   |   4 +-
 target/arm/tcg/translate-a32.h              |   1 +
 target/arm/tcg/translate-a64.c              | 139 +++++++---
 target/arm/tcg/translate-neon.c             |  74 +++---
 target/arm/tcg/translate-sme.c              | 130 ++++++++++
 target/arm/tcg/translate-sve.c              |  21 +-
 target/arm/tcg/translate-vfp.c              |  60 +++--
 target/arm/tcg/translate.c                  |  34 +--
 target/arm/tcg/translate.h                  |  23 ++
 target/arm/tcg/vec_internal.h               |   8 +
 tests/functional/arm/test_aspeed_anacapa.py |   4 +-
 tests/tcg/aarch64/Makefile.target           |  14 +-
 tests/tcg/arm/fcvt.c                        |   7 +
 59 files changed, 1576 insertions(+), 327 deletions(-)

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.