On Fri, Jul 3, 2026 at 6:37 AM Daniel Henrique Barboza
<daniel.barboza@oss.qualcomm.com> wrote:
>
> Hi,
>
> This new version fixes a blunder I made in v1 pointed by Chao and
> Nutty - I was using the PPN value, instead of the page table base
> address, to check for the 16kb alignment.
>
> We no longer need to change qos-riscv-iommu.h because now we're doing
> the right thing.
>
> Changes from v1:
> - use PPN_PHYS(iohgatp_ppn), i.e. the page table base address, to
> check for the 16kb alignment
> - v1 link: https://lore.kernel.org/qemu-devel/20260630203155.2103084-1-daniel.barboza@oss.qualcomm.com/
Thanks!
Applied to riscv-to-apply.next
Alistair
>
>
> Daniel Henrique Barboza (1):
> hw/riscv/riscv-iommu.c: check for misaligned IOHGATP_PPN
>
> hw/riscv/riscv-iommu.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> --
> 2.43.0
>
>