[PULL v4 00/77] hex queue

Brian Cain posted 77 patches an hour ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260629035830.1520296-1-brian.cain@oss.qualcomm.com
Maintainers: Brian Cain <brian.cain@oss.qualcomm.com>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Kohei Tokunaga <ktokunaga.mail@gmail.com>, Paolo Bonzini <pbonzini@redhat.com>, Laurent Vivier <laurent@vivier.eu>, Helge Deller <deller@gmx.de>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, "Daniel P. Berrangé" <berrange@redhat.com>, "Philippe Mathieu-Daudé" <philmd@mailo.com>, Alessandro Di Federico <ale@rev.ng>, Anton Johansson <anjo@rev.ng>, "Alex Bennée" <alex.bennee@linaro.org>, Kevin Wolf <kwolf@redhat.com>, Hanna Reitz <hreitz@redhat.com>, Fabiano Rosas <farosas@suse.de>
MAINTAINERS                                        |  16 +
docs/devel/hexagon-sys.rst                         | 112 ++++
docs/devel/index-internals.rst                     |   1 +
docs/system/hexagon/cdsp.rst                       |  12 +
docs/system/hexagon/emulation.rst                  |  15 +
docs/system/target-hexagon.rst                     | 103 ++++
docs/system/targets.rst                            |   1 +
configs/devices/hexagon-softmmu/default.mak        |   7 +
configs/targets/hexagon-softmmu.mak                |   8 +
meson.build                                        |   1 +
hw/hexagon/trace.h                                 |   2 +
include/hw/hexagon/hexagon.h                       | 161 ++++++
include/hw/hexagon/hexagon_globalreg.h             |  55 ++
include/hw/hexagon/hexagon_tlb.h                   |  46 ++
include/hw/hexagon/virt.h                          |  30 ++
target/hexagon/cpu-param.h                         |   2 +-
target/hexagon/cpu.h                               |  89 +++-
target/hexagon/cpu_bits.h                          |  75 ++-
target/hexagon/cpu_helper.h                        |  26 +
target/hexagon/gen_tcg.h                           |  16 +-
target/hexagon/gen_tcg_sys.h                       | 139 +++++
target/hexagon/helper.h                            |  27 +-
target/hexagon/hex_interrupts.h                    |  15 +
target/hexagon/hex_mmu.h                           |  26 +
target/hexagon/hex_regs.h                          | 117 +++++
target/hexagon/hexswi.h                            |  17 +
target/hexagon/idef-parser/parser-helpers.h        |   2 +
target/hexagon/internal.h                          |  22 +
target/hexagon/macros.h                            |  38 +-
target/hexagon/sys_macros.h                        | 252 +++++++++
target/hexagon/translate.h                         |  47 ++
hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc          |  64 +++
hw/hexagon/machine_cfg_v66g_1024.h.inc             |  64 +++
hw/hexagon/machine_cfg_v68n_1024.h.inc             |  64 +++
target/hexagon/attribs_def.h.inc                   |  35 +-
target/hexagon/reg_fields_def.h.inc                | 107 ++++
hw/hexagon/hexagon_dsp.c                           | 225 ++++++++
hw/hexagon/hexagon_globalreg.c                     | 316 +++++++++++
hw/hexagon/hexagon_tlb.c                           | 467 +++++++++++++++++
hw/hexagon/virt.c                                  | 347 +++++++++++++
linux-user/hexagon/cpu_loop.c                      |  23 +
system/qdev-monitor.c                              |   2 +-
target/hexagon/arch.c                              |   5 +
target/hexagon/cpu.c                               | 422 ++++++++++++++-
target/hexagon/cpu_helper.c                        | 399 ++++++++++++++
target/hexagon/decode.c                            |  14 +
target/hexagon/genptr.c                            | 173 ++++++-
target/hexagon/hex_interrupts.c                    | 371 +++++++++++++
target/hexagon/hex_mmu.c                           | 270 ++++++++++
target/hexagon/hexswi.c                            | 271 ++++++++++
target/hexagon/idef-parser/parser-helpers.c        |   9 +
target/hexagon/machine.c                           |  32 ++
target/hexagon/op_helper.c                         | 576 ++++++++++++++++++++-
target/hexagon/translate.c                         | 265 +++++++++-
tests/qtest/boot-serial-test.c                     |   8 +
tests/docker/dockerfiles/emsdk-wasm64-cross.docker |   2 +
configs/meson/emscripten.txt                       |   3 +
hw/Kconfig                                         |   1 +
hw/hexagon/Kconfig                                 |  14 +
hw/hexagon/meson.build                             |   7 +
hw/hexagon/trace-events                            |   3 +
hw/meson.build                                     |   1 +
target/Kconfig                                     |   1 +
target/hexagon/Kconfig                             |   2 +
target/hexagon/gen_analyze_funcs.py                |  14 +-
target/hexagon/gen_helper_funcs.py                 |  26 +-
target/hexagon/gen_helper_protos.py                |  23 +-
target/hexagon/gen_idef_parser_funcs.py            |   2 +
target/hexagon/gen_op_attribs.py                   |   2 +-
target/hexagon/gen_opcodes_def.py                  |   5 +-
target/hexagon/gen_tcg_funcs.py                    |  35 +-
target/hexagon/hex_common.py                       | 184 ++++++-
target/hexagon/idef-parser/idef-parser.y           |   5 +-
target/hexagon/imported/encode_pp.def              | 129 ++++-
target/hexagon/imported/ldst.idef                  |   3 +
target/hexagon/imported/macros.def                 | 482 ++++++++++++++++-
target/hexagon/imported/system.idef                | 243 ++++++++-
target/hexagon/meson.build                         |  30 +-
tests/qemu-iotests/testenv.py                      |   1 +
tests/qtest/meson.build                            |   2 +
80 files changed, 7079 insertions(+), 150 deletions(-)
create mode 100644 docs/devel/hexagon-sys.rst
create mode 100644 docs/system/hexagon/cdsp.rst
create mode 100644 docs/system/hexagon/emulation.rst
create mode 100644 docs/system/target-hexagon.rst
create mode 100644 configs/devices/hexagon-softmmu/default.mak
create mode 100644 configs/targets/hexagon-softmmu.mak
create mode 100644 hw/hexagon/trace.h
create mode 100644 include/hw/hexagon/hexagon.h
create mode 100644 include/hw/hexagon/hexagon_globalreg.h
create mode 100644 include/hw/hexagon/hexagon_tlb.h
create mode 100644 include/hw/hexagon/virt.h
create mode 100644 target/hexagon/cpu_helper.h
create mode 100644 target/hexagon/gen_tcg_sys.h
create mode 100644 target/hexagon/hex_interrupts.h
create mode 100644 target/hexagon/hex_mmu.h
create mode 100644 target/hexagon/hexswi.h
create mode 100644 target/hexagon/sys_macros.h
create mode 100644 hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc
create mode 100644 hw/hexagon/machine_cfg_v66g_1024.h.inc
create mode 100644 hw/hexagon/machine_cfg_v68n_1024.h.inc
create mode 100644 hw/hexagon/hexagon_dsp.c
create mode 100644 hw/hexagon/hexagon_globalreg.c
create mode 100644 hw/hexagon/hexagon_tlb.c
create mode 100644 hw/hexagon/virt.c
create mode 100644 target/hexagon/cpu_helper.c
create mode 100644 target/hexagon/hex_interrupts.c
create mode 100644 target/hexagon/hex_mmu.c
create mode 100644 target/hexagon/hexswi.c
create mode 100644 target/hexagon/machine.c
create mode 100644 hw/hexagon/Kconfig
create mode 100644 hw/hexagon/meson.build
create mode 100644 hw/hexagon/trace-events
create mode 100644 target/hexagon/Kconfig
mode change 100755 => 100644 target/hexagon/imported/macros.def
[PULL v4 00/77] hex queue
Posted by Brian Cain an hour ago
The following changes since commit 20553466cc47af6a8c95f665b601fce3c852e503:

  Merge tag 'pbouvier/pr/docs-20260626' of https://gitlab.com/p-b-o/qemu into staging (2026-06-27 23:28:35 -0400)

are available in the Git repository at:

  https://github.com/qualcomm/qemu tags/pull-hex-20260628

for you to fetch changes up to 959e0c3302d66c7f085ba9152bda68a672d9ddcf:

  tests/qtest: Add hexagon boot-serial-test (2026-06-28 20:52:28 -0700)

----------------------------------------------------------------
Hexagon system emulation - v3, including fixes for wasm build

idef parser disabled for wasm build.  Since we're introducing
hexagon system emulation here, this incompatibility had never
yet to be encountered.  idef parser has some more significant
build-time dependencies, which are not easily established when
building qemu for wasm.  Disable it for now and we may revisit
another approach in order to enable it later.

Tested: https://gitlab.com/brian-cain/qemu/-/pipelines/2635441421

----------------------------------------------------------------
Brian Cain (74):
      tests/docker: add flex and bison to emsdk-wasm64-cross
      configs/meson: disable hexagon idef-parser for emscripten builds
      target/hexagon: use cmd_array() instead of get_id()
      target/hexagon/idef-parser: open input file in binary mode
      docs: Add hexagon sysemu docs
      docs/system: Add hexagon CPU emulation
      target/hexagon: Fix badva reference, delete CAUSE
      target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof
      target/hexagon: Handle system/guest registers in gen_analyze_funcs.py and hex_common.py
      target/hexagon: Suppress unused-variable warnings for sysemu source regs
      target/hexagon: Switch to tag_ignore(), generate via get_{user, sys}_tags()
      target/hexagon: Add privilege check, use tag_ignore()
      target/hexagon: Add a placeholder fp exception
      target/hexagon: Add guest, system reg number defs
      target/hexagon: Add guest, system reg number state
      target/hexagon: Add TCG values for sreg, greg
      target/hexagon: Add guest/sys reg writes to DisasContext
      target/hexagon: Add imported macro, attr defs for sysemu
      target/hexagon: Add new macro definitions for sysemu
      target/hexagon: Add handlers for guest/sysreg r/w
      target/hexagon: Add placeholder greg/sreg r/w helpers
      target/hexagon: Add vmstate representation
      target/hexagon: Make A_PRIV, "J2_trap*" insts need_env()
      target/hexagon: Define register fields for system regs
      target/hexagon: Implement do_raise_exception()
      target/hexagon: Add system reg insns
      target/hexagon: Add sysemu TCG overrides
      target/hexagon: Add implicit attributes to sysemu macros
      target/hexagon: Add TCG overrides for int handler insts
      target/hexagon: Add TCG overrides for thread ctl
      target/hexagon: Add TCG overrides for rte, nmi
      target/hexagon: Add sreg_{read,write} helpers
      target/hexagon: Add representation to count cycles
      target/hexagon: Add implementation of cycle counters
      target/hexagon: Add pcycle setting functionality
      target/hexagon: Add cpu modes, mmu indices, next_PC to state
      hw/hexagon: Declare hexagon TLB device interface
      target/hexagon: Update TARGET_PAGE_BITS, stubs for modify_ssr/get_exe_mode
      target/hexagon: Define f{S,G}ET_FIELD macros
      target/hexagon: Add hex_interrupts support
      target/hexagon: Implement {c,}swi helpers
      target/hexagon: Implement iassign{r,w} helpers
      target/hexagon: Implement start/stop helpers, soft reset
      target/hexagon: Implement {g,s}etimask helpers
      target/hexagon: Implement wait helper
      target/hexagon: Implement get_exe_mode()
      target/hexagon: Implement hex_tlb_entry_get_perm()
      target/hexagon: Implement software interrupt
      target/hexagon: Implement stack overflow exception
      target/hexagon: Implement exec_interrupt, set_irq
      target/hexagon: Implement hexagon_tlb_fill()
      target/hexagon: Implement siad inst
      target/hexagon: Implement hexagon_resume_threads()
      target/hexagon: Implement setprio, resched
      target/hexagon: Add sysemu_ops, cpu_get_phys_page_debug()
      target/hexagon: extend hexagon_cpu_mmu_index() for sysemu
      target/hexagon: Decode trap1, rte as COF
      target/hexagon: Implement modify_ssr, resched, pending_interrupt
      target/hexagon: Add pkt_ends_tb to translation
      target/hexagon: Add next_PC, {s,g}reg writes
      target/hexagon: Add implicit sysreg writes
      target/hexagon: Define system, guest reg names
      target/hexagon: Add k0 {un,}lock
      target/hexagon: Add PC to raise_exception, use fTRAP() helper
      target/hexagon: Add TCG overrides for transfer insts
      target/hexagon: Add support for loadw_phys
      hw/hexagon: Add globalreg model
      hw/hexagon: Add global register tracing
      hw/hexagon: Add hexagon TLB device implementation
      hw/hexagon: Add machine configs for sysemu
      hw/hexagon: Add v68, sa8775-cdsp0 defs
      target/hexagon: add build config for softmmu
      hw/hexagon: Define hexagon "virt" machine
      tests/qtest: Add hexagon boot-serial-test

Matheus Tavares Bernardino (2):
      target/hexagon: add simple cpu_exec_reset and pointer_wrap
      target/hexagon: Add guest reg reading functionality

Sid Manning (1):
      hw/hexagon: Add support for cfgbase

 MAINTAINERS                                        |  16 +
 docs/devel/hexagon-sys.rst                         | 112 ++++
 docs/devel/index-internals.rst                     |   1 +
 docs/system/hexagon/cdsp.rst                       |  12 +
 docs/system/hexagon/emulation.rst                  |  15 +
 docs/system/target-hexagon.rst                     | 103 ++++
 docs/system/targets.rst                            |   1 +
 configs/devices/hexagon-softmmu/default.mak        |   7 +
 configs/targets/hexagon-softmmu.mak                |   8 +
 meson.build                                        |   1 +
 hw/hexagon/trace.h                                 |   2 +
 include/hw/hexagon/hexagon.h                       | 161 ++++++
 include/hw/hexagon/hexagon_globalreg.h             |  55 ++
 include/hw/hexagon/hexagon_tlb.h                   |  46 ++
 include/hw/hexagon/virt.h                          |  30 ++
 target/hexagon/cpu-param.h                         |   2 +-
 target/hexagon/cpu.h                               |  89 +++-
 target/hexagon/cpu_bits.h                          |  75 ++-
 target/hexagon/cpu_helper.h                        |  26 +
 target/hexagon/gen_tcg.h                           |  16 +-
 target/hexagon/gen_tcg_sys.h                       | 139 +++++
 target/hexagon/helper.h                            |  27 +-
 target/hexagon/hex_interrupts.h                    |  15 +
 target/hexagon/hex_mmu.h                           |  26 +
 target/hexagon/hex_regs.h                          | 117 +++++
 target/hexagon/hexswi.h                            |  17 +
 target/hexagon/idef-parser/parser-helpers.h        |   2 +
 target/hexagon/internal.h                          |  22 +
 target/hexagon/macros.h                            |  38 +-
 target/hexagon/sys_macros.h                        | 252 +++++++++
 target/hexagon/translate.h                         |  47 ++
 hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc          |  64 +++
 hw/hexagon/machine_cfg_v66g_1024.h.inc             |  64 +++
 hw/hexagon/machine_cfg_v68n_1024.h.inc             |  64 +++
 target/hexagon/attribs_def.h.inc                   |  35 +-
 target/hexagon/reg_fields_def.h.inc                | 107 ++++
 hw/hexagon/hexagon_dsp.c                           | 225 ++++++++
 hw/hexagon/hexagon_globalreg.c                     | 316 +++++++++++
 hw/hexagon/hexagon_tlb.c                           | 467 +++++++++++++++++
 hw/hexagon/virt.c                                  | 347 +++++++++++++
 linux-user/hexagon/cpu_loop.c                      |  23 +
 system/qdev-monitor.c                              |   2 +-
 target/hexagon/arch.c                              |   5 +
 target/hexagon/cpu.c                               | 422 ++++++++++++++-
 target/hexagon/cpu_helper.c                        | 399 ++++++++++++++
 target/hexagon/decode.c                            |  14 +
 target/hexagon/genptr.c                            | 173 ++++++-
 target/hexagon/hex_interrupts.c                    | 371 +++++++++++++
 target/hexagon/hex_mmu.c                           | 270 ++++++++++
 target/hexagon/hexswi.c                            | 271 ++++++++++
 target/hexagon/idef-parser/parser-helpers.c        |   9 +
 target/hexagon/machine.c                           |  32 ++
 target/hexagon/op_helper.c                         | 576 ++++++++++++++++++++-
 target/hexagon/translate.c                         | 265 +++++++++-
 tests/qtest/boot-serial-test.c                     |   8 +
 tests/docker/dockerfiles/emsdk-wasm64-cross.docker |   2 +
 configs/meson/emscripten.txt                       |   3 +
 hw/Kconfig                                         |   1 +
 hw/hexagon/Kconfig                                 |  14 +
 hw/hexagon/meson.build                             |   7 +
 hw/hexagon/trace-events                            |   3 +
 hw/meson.build                                     |   1 +
 target/Kconfig                                     |   1 +
 target/hexagon/Kconfig                             |   2 +
 target/hexagon/gen_analyze_funcs.py                |  14 +-
 target/hexagon/gen_helper_funcs.py                 |  26 +-
 target/hexagon/gen_helper_protos.py                |  23 +-
 target/hexagon/gen_idef_parser_funcs.py            |   2 +
 target/hexagon/gen_op_attribs.py                   |   2 +-
 target/hexagon/gen_opcodes_def.py                  |   5 +-
 target/hexagon/gen_tcg_funcs.py                    |  35 +-
 target/hexagon/hex_common.py                       | 184 ++++++-
 target/hexagon/idef-parser/idef-parser.y           |   5 +-
 target/hexagon/imported/encode_pp.def              | 129 ++++-
 target/hexagon/imported/ldst.idef                  |   3 +
 target/hexagon/imported/macros.def                 | 482 ++++++++++++++++-
 target/hexagon/imported/system.idef                | 243 ++++++++-
 target/hexagon/meson.build                         |  30 +-
 tests/qemu-iotests/testenv.py                      |   1 +
 tests/qtest/meson.build                            |   2 +
 80 files changed, 7079 insertions(+), 150 deletions(-)
 create mode 100644 docs/devel/hexagon-sys.rst
 create mode 100644 docs/system/hexagon/cdsp.rst
 create mode 100644 docs/system/hexagon/emulation.rst
 create mode 100644 docs/system/target-hexagon.rst
 create mode 100644 configs/devices/hexagon-softmmu/default.mak
 create mode 100644 configs/targets/hexagon-softmmu.mak
 create mode 100644 hw/hexagon/trace.h
 create mode 100644 include/hw/hexagon/hexagon.h
 create mode 100644 include/hw/hexagon/hexagon_globalreg.h
 create mode 100644 include/hw/hexagon/hexagon_tlb.h
 create mode 100644 include/hw/hexagon/virt.h
 create mode 100644 target/hexagon/cpu_helper.h
 create mode 100644 target/hexagon/gen_tcg_sys.h
 create mode 100644 target/hexagon/hex_interrupts.h
 create mode 100644 target/hexagon/hex_mmu.h
 create mode 100644 target/hexagon/hexswi.h
 create mode 100644 target/hexagon/sys_macros.h
 create mode 100644 hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc
 create mode 100644 hw/hexagon/machine_cfg_v66g_1024.h.inc
 create mode 100644 hw/hexagon/machine_cfg_v68n_1024.h.inc
 create mode 100644 hw/hexagon/hexagon_dsp.c
 create mode 100644 hw/hexagon/hexagon_globalreg.c
 create mode 100644 hw/hexagon/hexagon_tlb.c
 create mode 100644 hw/hexagon/virt.c
 create mode 100644 target/hexagon/cpu_helper.c
 create mode 100644 target/hexagon/hex_interrupts.c
 create mode 100644 target/hexagon/hex_mmu.c
 create mode 100644 target/hexagon/hexswi.c
 create mode 100644 target/hexagon/machine.c
 create mode 100644 hw/hexagon/Kconfig
 create mode 100644 hw/hexagon/meson.build
 create mode 100644 hw/hexagon/trace-events
 create mode 100644 target/hexagon/Kconfig
 mode change 100755 => 100644 target/hexagon/imported/macros.def