On Sat, Jun 27, 2026 at 3:35 AM Daniel Henrique Barboza
<daniel.barboza@oss.qualcomm.com> wrote:
>
> We're hardcoding 'true' to FQ_HDR_PV in riscv_iommu_report_fault(). Use
> the 'pv' bool the caller provides that indicates if the process_id is
> valid.
>
> Fixes: 0c54acb8243d ("hw/riscv: add RISC-V IOMMU base emulation")
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3556
> Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> hw/riscv/riscv-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index d47abf9eb3..3ea9130860 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -580,7 +580,7 @@ static void riscv_iommu_report_fault(RISCVIOMMUState *s,
> ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_CAUSE, cause);
> ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_TTYPE, fault_type);
> ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_DID, ctx->devid);
> - ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PV, true);
> + ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PV, pv);
>
> if (pv) {
> ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PID, ctx->process_id);
> --
> 2.43.0
>
>