The following changes since commit b83371668192a705b878e909c5ae9c1233cbd5fb:

  Merge tag 'pbouvier/pr/plugins-20260618' of https://gitlab.com/p-b-o/qemu into staging (2026-06-19 15:00:01 -0400)

are available in the Git repository at:

  https://gitlab.com/bonzini/qemu.git tags/for-upstream

for you to fetch changes up to db13fe80ef455f9e2be60c1bdc6be67a6b82d24f:

  i386/tdx: Add CPUID_24_0_EBX_AVX10_VL_MASK as supported (2026-06-26 00:48:23 +0200)

----------------------------------------------------------------
* target/i386/mshv: CPU model support
* target/i386/mshv: first part of migration support
* target/i386/mshv: faster register access for MMIO exits
* target/i386/tdx: add support for AMX alias bits in CPUID and AVX10
* Deprecate memory-encryption in favor of confidential-guest-support

----------------------------------------------------------------
Doru Blânzeanu (4):
      include/hw/hyperv: add hv_vp_register_page struct definition
      target/i386/mshv: hv_vp_register_page setup for the vcpu
      target/i386/mshv: use the register page to get registers
      target/i386/mshv: use the register page to set registers

Magnus Kulke (32):
      accel/mshv: use mshv_create_partition_v2 payload
      target/i386/mshv: fix cpuid propagation bug
      target/i386/mshv: fix various cpuid traversal bugs
      target/i386/mshv: change cpuid mask to UINT32_MAX
      target/i386/mshv: set cpu model name on -cpu host
      target/i386: query mshv accel for supported cpuids
      target/i386/mshv: populate xsave area offsets
      target/i386/mshv: use hv-provided [0xD,1+2].EBX
      accel/mshv: disable la57 (5lvl paging)
      target/i386/mshv: use arch_load/store_reg fns
      target/i386/mshv: use generic FPU/xcr0 state
      target/i386/mshv: impl init/load/store_vcpu_state
      accel/accel-irq: add AccelRouteChange abstraction
      accel/accel-irq: add generic begin_route_changes
      accel/accel-irq: add generic commit_route_changes
      accel/mshv: add irq_routes to state
      accel/mshv: update s->irq_routes in add_msi_route
      accel/mshv: update s->irq_routes in update_msi_route
      accel/mshv: update s->irq_routes in release_virq
      accel/mshv: use s->irq_routes in commit_routes
      accel/mshv: reserve ioapic routes on s->irq_routes
      accel/mshv: remove redundant msi controller
      accel/mshv: store partition proc features
      target/i386/mshv: expose mshv_get_generic_regs
      accel/mshv: enable dirty page tracking
      target/i386/mshv: move msr code to arch
      target/i386/mshv: migrate pending ints/excs
      target/i386/mshv: migrate XSAVE state
      target/i386/mshv: reconstruct hflags after load
      target/i386/mshv: migrate MSRs
      target/i386/mshv: migrate MTRR MSRs
      target/i386/mshv: migrate CET/SS MSRs

Paolo Bonzini (1):
      accel: remove unnecessary #ifdefs

Xiaoyao Li (8):
      i386/sev: Remove the example that references memory-encryption
      qemu-options: Change memory-encryption to confidential-guest-support in the example
      qemu-options: Add confidential-guest-support to machine options
      qemu-options: Add description of tdx-guest object
      machine: Deprecate memory-encryption
      i386/tdx: Use .has_gpa field to check if the gpa is valid
      i386/tdx: Make AMX alias bits supported
      i386/tdx: Add CPUID_24_0_EBX_AVX10_VL_MASK as supported

 docs/about/deprecated.rst      |    7 +
 include/accel/accel-route.h    |   17 +
 include/hw/hyperv/hvgdk_mini.h |  133 +++++
 include/hw/hyperv/hvhdk.h      |  195 +++++++
 include/system/accel-irq.h     |    6 +-
 include/system/kvm.h           |   23 +-
 include/system/mshv.h          |   18 +-
 include/system/mshv_int.h      |   72 +--
 target/i386/cpu.h              |    9 +-
 accel/accel-irq.c              |   51 +-
 accel/kvm/kvm-all.c            |    6 +-
 accel/mshv/irq.c               |  362 ++++++-------
 accel/mshv/mem.c               |  211 ++++++++
 accel/mshv/mshv-all.c          |  161 +++++-
 accel/mshv/msr.c               |  375 -------------
 accel/stubs/kvm-stub.c         |    2 +-
 accel/stubs/mshv-stub.c        |    7 +-
 hw/core/machine.c              |    2 +
 hw/misc/ivshmem-pci.c          |    8 +-
 hw/vfio/pci.c                  |   11 +-
 hw/virtio/virtio-pci.c         |    3 +-
 system/runstate.c              |    2 +-
 target/i386/cpu.c              |    8 +
 target/i386/kvm/kvm.c          |    5 +-
 target/i386/kvm/tdx.c          |   28 +-
 target/i386/mshv/mshv-cpu.c    | 1143 ++++++++++++++++++++++++++++++----------
 target/i386/mshv/msr.c         |  425 +++++++++++++++
 target/i386/sev.c              |    4 -
 accel/mshv/meson.build         |    1 -
 qemu-options.hx                |   52 +-
 target/i386/meson.build        |    2 +-
 target/i386/mshv/meson.build   |    1 +
 32 files changed, 2353 insertions(+), 997 deletions(-)
 create mode 100644 include/accel/accel-route.h
 delete mode 100644 accel/mshv/msr.c
 create mode 100644 target/i386/mshv/msr.c
-- 
2.54.0

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.