Fix two XThead immediate decoding issues in the RISC-V disassembler.

The first patch aligns th.srri decoding with target/riscv/xthead.decode:
th_srri uses bits 31:26 as 000100 and bit 25 as shamt[5], while the
disassembler switches on bits 31:25.

The second patch extracts the full 6-bit immediate field for
rv_codec_r2_imm6, which fixes the immediate printed for th.srri and
th.tst.

This series is based on Alistair's riscv-to-apply.next branch:
05f8cb49b0f0 ("hw/riscv: add create_fdt_plic() helper")

---
TANG Tiancheng (2):
      disas/riscv: Fix th.srri decoding
      disas/riscv: Fix 6-bit immediate extraction

 disas/riscv-xthead.c | 6 ++++--
 disas/riscv.c        | 2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)
---
base-commit: 05f8cb49b0f02312abd34a019ff38b2c7c466a40
change-id: 20260623-b4-disas-xthead-fix-riscv-next-c6af6a09d2dc

Best regards,
-- 
TANG Tiancheng <lyndra@linux.alibaba.com>