The %ignore_memory_transaction_failures flag is meant for legacy
machines, and is defined once per machine. It is applied to all
vCPUs such machine creates, to be eventually only used by the TCG
SoftMMU layer.
We can decouple it of the vCPU layer by making it a TCG-specific
global, setting it once when the machine is initialized (via the
per-accelerator init_machine callback), allowing to remove machine
code in the common vCPU layer.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
 accel/tcg/internal-common.h |  2 ++
 include/hw/core/cpu.h       |  2 --
 accel/tcg/cputlb.c          |  8 ++++++--
 accel/tcg/tcg-all.c         |  3 +++
 hw/core/cpu-common.c        | 15 ---------------
 5 files changed, 11 insertions(+), 19 deletions(-)

diff --git a/accel/tcg/internal-common.h b/accel/tcg/internal-common.h
index 9e7be2d78df..cd8896bafd5 100644
--- a/accel/tcg/internal-common.h
+++ b/accel/tcg/internal-common.h
@@ -21,6 +21,8 @@ extern bool one_insn_per_tb;
 
 extern bool icount_align_option;
 
+extern bool tlb_ignore_memory_transaction_failures;
+
 /*
  * Return true if CS is not running in parallel with other cpus, either
  * because there are no other cpus or we are within an exclusive context.
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 59d601465b4..72666189774 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -575,8 +575,6 @@ struct CPUState {
      */
     int64_t throttle_us_per_full;
 
-    bool ignore_memory_transaction_failures;
-
     /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
     bool prctl_unalign_sigbus;
 
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 6e66f3c6e93..9028f386965 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -90,6 +90,8 @@
  */
 QEMU_BUILD_BUG_ON(sizeof(vaddr) > sizeof(run_on_cpu_data));
 
+bool tlb_ignore_memory_transaction_failures;
+
 #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)
 
 static inline size_t tlb_n_entries(CPUTLBDescFast *fast)
@@ -1291,8 +1293,10 @@ static void io_failed(CPUState *cpu, CPUTLBEntryFull *full, vaddr addr,
                       unsigned size, MMUAccessType access_type, int mmu_idx,
                       MemTxResult response, uintptr_t retaddr)
 {
-    if (!cpu->ignore_memory_transaction_failures
-        && cpu->cc->tcg_ops->do_transaction_failed) {
+    if (unlikely(tlb_ignore_memory_transaction_failures)) {
+        return;
+    }
+    if (cpu->cc->tcg_ops->do_transaction_failed) {
         hwaddr physaddr = full->phys_addr | (addr & ~TARGET_PAGE_MASK);
 
         cpu->cc->tcg_ops->do_transaction_failed(cpu, physaddr, addr, size,
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index 8eb4a6b89e8..1b1ac0dbab6 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -107,9 +107,12 @@ static int tcg_init_machine(AccelState *as, MachineState *ms)
     unsigned max_threads = 1;
 
 #ifndef CONFIG_USER_ONLY
+    MachineClass *mc = MACHINE_GET_CLASS(ms);
     CPUClass *cc = CPU_CLASS(object_class_by_name(target_cpu_type()));
     bool mttcg_supported = cc->tcg_ops->mttcg_supported;
 
+    tlb_ignore_memory_transaction_failures = mc->ignore_memory_transaction_failures;
+
     switch (s->mttcg_enabled) {
     case ON_OFF_AUTO_AUTO:
         /*
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index e314f916f84..b74a39c96ac 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -32,7 +32,6 @@
 #include "exec/log.h"
 #include "exec/gdbstub.h"
 #include "system/tcg.h"
-#include "hw/core/boards.h"
 #include "hw/core/qdev-properties.h"
 #include "trace.h"
 #ifdef CONFIG_PLUGIN
@@ -247,20 +246,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cpu = CPU(dev);
-    Object *machine = qdev_get_machine();
-
-    /* qdev_get_machine() can return something that's not TYPE_MACHINE
-     * if this is one of the user-only emulators; in that case there's
-     * no need to check the ignore_memory_transaction_failures board flag.
-     */
-    if (object_dynamic_cast(machine, TYPE_MACHINE)) {
-        MachineClass *mc = MACHINE_GET_CLASS(machine);
-
-        if (mc) {
-            cpu->ignore_memory_transaction_failures =
-                mc->ignore_memory_transaction_failures;
-        }
-    }
 
     if (dev->hotplugged) {
         cpu_synchronize_post_init(cpu);
-- 
2.53.0

On 6/24/26 08:49, Philippe Mathieu-Daudé wrote:
> The %ignore_memory_transaction_failures flag is meant for legacy
> machines, and is defined once per machine. It is applied to all
> vCPUs such machine creates, to be eventually only used by the TCG
> SoftMMU layer.
> We can decouple it of the vCPU layer by making it a TCG-specific
> global, setting it once when the machine is initialized (via the
> per-accelerator init_machine callback), allowing to remove machine
> code in the common vCPU layer.
> 
> Signed-off-by: Philippe Mathieu-Daudé<philmd@oss.qualcomm.com>
> ---
>   accel/tcg/internal-common.h |  2 ++
>   include/hw/core/cpu.h       |  2 --
>   accel/tcg/cputlb.c          |  8 ++++++--
>   accel/tcg/tcg-all.c         |  3 +++
>   hw/core/cpu-common.c        | 15 ---------------
>   5 files changed, 11 insertions(+), 19 deletions(-)

Nice.  Perhaps note PHASE_MACHINE_CREATED comes before PHASE_ACCEL_CREATED?

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~