tcg/loongarch64/tcg-target.c.inc | 39 +++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 11 deletions(-)
For NE we need to invert EQ, not swap operands.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3589
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 39 +++++++++++++++++++++++---------
1 file changed, 28 insertions(+), 11 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index c3350c90fc..182dcfd5eb 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -2371,19 +2371,36 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
default:
g_assert_not_reached();
}
- break;
- }
-
- insn = cmp_vec_insn[cond][lasx][vece];
- if (insn == 0) {
- TCGArg t;
- t = a1, a1 = a2, a2 = t;
- cond = tcg_swap_cond(cond);
- insn = cmp_vec_insn[cond][lasx][vece];
- tcg_debug_assert(insn != 0);
+ } else {
+ switch (cond) {
+ case TCG_COND_EQ:
+ case TCG_COND_LE:
+ case TCG_COND_LEU:
+ case TCG_COND_LT:
+ case TCG_COND_LTU:
+ insn = cmp_vec_insn[cond][lasx][vece];
+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
+ break;
+ case TCG_COND_GE:
+ case TCG_COND_GEU:
+ case TCG_COND_GT:
+ case TCG_COND_GTU:
+ insn = cmp_vec_insn[tcg_swap_cond(cond)][lasx][vece];
+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a2, a1));
+ break;
+ case TCG_COND_NE:
+ /* ne -> not(eq) */
+ insn = cmp_vec_insn[TCG_COND_EQ][lasx][vece];
+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
+ insn = lasx ? OPC_XVNOR_V : OPC_VNOR_V;
+ tcg_out32(s, encode_vdvjvk_insn(insn, a0, a0, a0));
+ break;
+ default:
+ g_assert_not_reached();
+ }
}
}
- goto vdvjvk;
+ break;
case INDEX_op_add_vec:
tcg_out_addsub_vec(s, lasx, vece, a0, a1, a2, const_args[2], true);
break;
--
2.43.0
On 23.06.2026 17:06, Richard Henderson wrote:
> For NE we need to invert EQ, not swap operands.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3589
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This feels like a qemu-stable material.
I'm picking it up for the stable series,
please let me know if I should not.
Thanks,
/mjt
> diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
> index c3350c90fc..182dcfd5eb 100644
> --- a/tcg/loongarch64/tcg-target.c.inc
> +++ b/tcg/loongarch64/tcg-target.c.inc
> @@ -2371,19 +2371,36 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
> default:
> g_assert_not_reached();
> }
> - break;
> - }
> -
> - insn = cmp_vec_insn[cond][lasx][vece];
> - if (insn == 0) {
> - TCGArg t;
> - t = a1, a1 = a2, a2 = t;
> - cond = tcg_swap_cond(cond);
> - insn = cmp_vec_insn[cond][lasx][vece];
> - tcg_debug_assert(insn != 0);
> + } else {
> + switch (cond) {
> + case TCG_COND_EQ:
> + case TCG_COND_LE:
> + case TCG_COND_LEU:
> + case TCG_COND_LT:
> + case TCG_COND_LTU:
> + insn = cmp_vec_insn[cond][lasx][vece];
> + tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
> + break;
> + case TCG_COND_GE:
> + case TCG_COND_GEU:
> + case TCG_COND_GT:
> + case TCG_COND_GTU:
> + insn = cmp_vec_insn[tcg_swap_cond(cond)][lasx][vece];
> + tcg_out32(s, encode_vdvjvk_insn(insn, a0, a2, a1));
> + break;
> + case TCG_COND_NE:
> + /* ne -> not(eq) */
> + insn = cmp_vec_insn[TCG_COND_EQ][lasx][vece];
> + tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
> + insn = lasx ? OPC_XVNOR_V : OPC_VNOR_V;
> + tcg_out32(s, encode_vdvjvk_insn(insn, a0, a0, a0));
> + break;
> + default:
> + g_assert_not_reached();
> + }
> }
> }
> - goto vdvjvk;
> + break;
> case INDEX_op_add_vec:
> tcg_out_addsub_vec(s, lasx, vece, a0, a1, a2, const_args[2], true);
> break;
On 09.07.2026 08:45, Michael Tokarev wrote: > On 23.06.2026 17:06, Richard Henderson wrote: >> For NE we need to invert EQ, not swap operands. >> >> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3589 >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > This feels like a qemu-stable material. > I'm picking it up for the stable series, > please let me know if I should not. And for 10.0.x "LTS" series, I'm also picking up 2 extra commits: a079836005 tcg/loongarch64: Fix vec_val computation in tcg_target_const_match 911f7328e9 tcg/loongarch64: Improve constraints for TCG_CT_CONST_VCMP which looks like an improvement too :) Again, please let me know if I should not. Thanks, /mjt
On 7/8/26 22:54, Michael Tokarev wrote: > On 09.07.2026 08:45, Michael Tokarev wrote: >> On 23.06.2026 17:06, Richard Henderson wrote: >>> For NE we need to invert EQ, not swap operands. >>> >>> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3589 >>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> >> This feels like a qemu-stable material. >> I'm picking it up for the stable series, >> please let me know if I should not. > > And for 10.0.x "LTS" series, I'm also picking up 2 extra commits: > > a079836005 tcg/loongarch64: Fix vec_val computation in tcg_target_const_match > 911f7328e9 tcg/loongarch64: Improve constraints for TCG_CT_CONST_VCMP > > which looks like an improvement too :) > > Again, please let me know if I should not. Thanks. r~
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