target/riscv/cpu.c: satp-mode=bare changes

[PATCH 0/2] target/riscv/cpu.c: satp-mode=bare changes

Daniel Henrique Barboza posted 2 patches 1 month, 2 weeks ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260611162223.2361941-1-daniel.barboza@oss.qualcomm.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu.zevorn@gmail.com>

target/riscv/cpu.c | 25 +++++--------------------
1 file changed, 5 insertions(+), 20 deletions(-)

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[PATCH 0/2] target/riscv/cpu.c: satp-mode=bare changes

Posted by Daniel Henrique Barboza 1 month, 2 weeks ago

Greetings,

Here are two mostly trivial patches related to satp-mode=bare support.

Patches based on alistair/riscv-to-apply.next.


Daniel Henrique Barboza (2):
  target/riscv/cpu.c: add 'svbare' satp-mode
  target/riscv/cpu.c: do not default to svbare for bare CPUs

 target/riscv/cpu.c | 25 +++++--------------------
 1 file changed, 5 insertions(+), 20 deletions(-)

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2.43.0