Hi; here's an arm pullreq. The biggest part of this is RTH's
patches implementing FEAT_FP8 and related features. Gabriel
Brookman's MTE4 emulation is also in here.
thanks
-- PMM
The following changes since commit de5d8bfd6105d3dd3ae668df9762df244a6d1506:
Merge tag 'pull-loongarch-20260609' of https://github.com/gaosong715/qemu into staging (2026-06-09 14:00:28 -0400)
are available in the Git repository at:
https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260610
for you to fetch changes up to c45b02cb24ee20ffee2508f50278b392526427eb:
target/arm: Enable FEAT_F8F16MM for -cpu max (2026-06-10 16:54:40 +0100)
----------------------------------------------------------------
target-arm queue:
* Emulate various FP8 related features: FEAT_F8F16MM, FEAT_F8F32MM,
FEAT_FP8DOT2, FEAT_SSVE_FP8DOT2, FEAT_FP8DOT4, FEAT_SSVE_FP8DOT4,
FEAT_FP8FMA, FEAT_SSVE_FP8FMA, FEAT_SME_LUTv2, FEAT_FP8, FEAT_LUT
* Emulate MTE4 features: FEAT_MTE_CANONICAL_TAGS,
FEAT_MTE_NO_ADDRESS_TAGS, FEAT_MTE_PERM,FEAT_MTE_STORE_ONLY,
FEAT_MTE_TAGGED_FAR
* target/arm: fix WFET typo in syndrome
* target/arm: Preparatory patches for implementing WFE
* hw/dma/pl080: Don't use hw_error() for unimplemented features
* hw/intc/exynos4210_combiner: Avoid hw_error for guest errors
* hw/usb/hcd-ohci: Clean up USBPacket before freeing ISO TD packet
* hw/core/qdev-clock: Fix potential null pointer dereference
----------------------------------------------------------------
Alex Bennée (4):
target/arm: fix WFET typo in syndrome
target/arm: teach arm_cpu_has_work about halting reasons
target/arm: redefine event stream fields
target/arm: ensure aarch64 DISAS_WFE will exit
Gabriel Brookman (15):
target/arm: implement MTE_PERM
target/arm: add TCSO bitmasks to SCTLR
target/arm: mte_check unemitted on STORE_ONLY load
linux-user: add MTE_STORE_ONLY to prctl
target/arm: emit tag check when MTX without TBI
target/arm: add MTX to MTEDESC and DisasContext
target/arm: add canonical tag check helper
target/arm: add canonical MTE check logic
target/arm: load on canonical tag loads ext bits
target/arm: fault on tag store to canonical tag
target/arm: skip tag bit bounds check if MTX is on
target/arm: tag is not a part of PAuth with MTX
docs: add MTE4 features to docs
tests/tcg: add test for MTE FAR
tests/tcg: add test for MTE_STORE_ONLY
Munkhbaatar Enkhbaatar (2):
hw/usb/hcd-ohci: Assert isochronous TDs are never deferred
hw/usb/hcd-ohci: Clean up USBPacket before freeing ISO TD packet
Peter Maydell (2):
hw/intc/exynos4210_combiner: Avoid hw_error for guest errors
hw/dma/pl080: Don't use hw_error() for unimplemented features
Richard Henderson (47):
fpu: Handle all rounding modes in partsN_uncanon_normal
fpu: Handle all rounding modes in partsN_round_to_int_normal
target/arm: Use FloatParts64 in bfdotadd_ebf
target/arm: Drop oddstatus from is_ebf and bfdotadd_ebf
target/arm: Use FloatParts64 in f16_dotadd
target/arm: Generalize TRANS_FEAT_STREAMING_SME2
target/arm: Introduce arm_init_fp_status
target/arm: Set e4m3_nan_is_snan
target/arm: Implement BF1CVTL, BF1CVTL2, BF2CVTL, BF2CVTL2 for AdvSIMD
target/arm: Implement BF1CVT, BF1CVTLT, BF2CVT, BF2CVTLT for SVE
target/arm: Rename SME BFCVT patterns to BFCVT_hs
target/arm: Implement BF1CVT, BF1CVTL, BF2CVT, BF2CVTL for SME
target/arm: Implement F1CVTL, F1CVTL2, F2CVTL, F2CVTL2 for AdvSIMD
target/arm: Implement F1CVT, F1CVTLT, F2CVT, F2CVTLT for SVE
target/arm: Implement F1CVT, F1CVTL, F2CVT, F2CVTL for SME
target/arm: Implement BFCVTN for SVE
target/arm: Implement FCVTN (16- to 8-bit fp) for AdvSIMD
target/arm: Implement FCVTN, FCVTN2 (32- to 8-bit fp) for AdvSIMD
target/arm: Implement FCVTN (16- to 8-bit fp) for SVE
target/arm: Implement FCVTNB, FCVTNT for SVE
target/arm: Implement FCVT (FP16 to FP8) for SME
target/arm: Implement FCVT, FCVTN (FP32 to FP8) for SME
target/arm: Implement LUTI2, LUTI4 for AdvSIMD
target/arm: Implement LUTI2, LUTI4 for SVE
target/arm: Enable FEAT_LUT for -cpu max
target/arm: Enable FEAT_FP8 for -cpu max
target/arm: Update ID_AA64SMFR0_EL1 fields to ARM M.b
target/arm: Implement MOVT (vector to table)
target/arm: Implement LUTI4 (four registers, 8-bit)
target/arm: Enable FEAT_SME_LUTv2 for -cpu max
target/arm: Implement FMLALB, FMLALT for AdvSIMD
target/arm: Implement FMLALB, FMLALT (FP8 to FP16) for SVE
target/arm: Implement FMLALL{BB, BT, TB, TT} for AdvSIMD
target/arm: Implement FMLALL{BB,BT,TB,TT} for SVE
target/arm: Enable FEAT_FP8FMA, FEAT_SSVE_FP8FMA for -cpu max
target/arm: Implement FDOT (FP8 to FP32) for AdvSIMD
target/arm: Implement FDOT (FP8 to FP32) for SVE
target/arm: Enable FEAT_FP8DOT4, FEAT_SSVE_FP8DOT4 for -cpu max
target/arm: Implement FDOT (FP8 to FP16) for AdvSIMD
target/arm: Implement FDOT (FP8 to FP16) for SVE
target/arm: Enable FEAT_FP8DOT2, FEAT_SSVE_FP8DOT2 for -cpu max
target/arm: Implement FMMLA (FP8 to FP32) for AdvSIMD
target/arm: Implement FMMLA (FP8 to FP32) for SVE
target/arm: Enable FEAT_F8F32MM for -cpu max
target/arm: Implement FMMLA (FP8 to FP16) for AdvSIMD
target/arm: Implement FMMLA (FP8 to FP16) for SVE
target/arm: Enable FEAT_F8F16MM for -cpu max
hemanshu.khilari.foss (1):
hw/core/qdev-clock: Fix potential null pointer dereference
docs/system/arm/emulation.rst | 16 +
fpu/softfloat-parts.c.inc | 5 +
hw/core/qdev-clock.c | 9 +-
hw/dma/pl080.c | 6 +-
hw/intc/exynos4210_combiner.c | 29 +-
hw/usb/hcd-ohci.c | 10 +-
linux-user/aarch64/elfload.c | 13 +
linux-user/aarch64/mte_user_helper.c | 11 +-
linux-user/aarch64/mte_user_helper.h | 14 +-
linux-user/aarch64/target_prctl.h | 6 +-
target/arm/arm-powerctl.c | 6 +-
target/arm/cpu-features.h | 98 ++++
target/arm/cpu.c | 60 ++-
target/arm/cpu.h | 21 +
target/arm/gdbstub64.c | 2 +-
target/arm/helper-fp8.h | 14 +
target/arm/helper.c | 44 +-
target/arm/internals.h | 62 ++-
target/arm/kvm.c | 5 +-
target/arm/machine.c | 2 +-
target/arm/ptw.c | 60 ++-
target/arm/syndrome.h | 2 +-
target/arm/tcg/a64.decode | 39 ++
target/arm/tcg/cpu64.c | 21 +
target/arm/tcg/fp8_helper.c | 859 +++++++++++++++++++++++++++++++++++
target/arm/tcg/helper-a64-defs.h | 16 +-
target/arm/tcg/helper-a64.c | 7 +-
target/arm/tcg/helper-defs.h | 6 +
target/arm/tcg/helper-fp8-defs.h | 40 ++
target/arm/tcg/helper-sme-defs.h | 2 +-
target/arm/tcg/hflags.c | 25 +-
target/arm/tcg/meson.build | 1 +
target/arm/tcg/mte_helper.c | 146 +++++-
target/arm/tcg/op_helper.c | 3 +
target/arm/tcg/pauth_helper.c | 18 +-
target/arm/tcg/sme.decode | 25 +-
target/arm/tcg/sme_helper.c | 109 ++---
target/arm/tcg/sve.decode | 48 +-
target/arm/tcg/sve_helper.c | 6 +-
target/arm/tcg/translate-a64.c | 229 ++++++++--
target/arm/tcg/translate-a64.h | 1 +
target/arm/tcg/translate-sme.c | 71 ++-
target/arm/tcg/translate-sve.c | 245 +++++++++-
target/arm/tcg/translate.h | 10 +-
target/arm/tcg/vec_helper.c | 194 +++++---
target/arm/tcg/vec_internal.h | 12 +-
tests/tcg/aarch64/Makefile.target | 2 +-
tests/tcg/aarch64/mte-10.c | 49 ++
tests/tcg/aarch64/mte-9.c | 48 ++
tests/tcg/aarch64/mte.h | 7 +-
50 files changed, 2428 insertions(+), 306 deletions(-)
create mode 100644 target/arm/helper-fp8.h
create mode 100644 target/arm/tcg/fp8_helper.c
create mode 100644 target/arm/tcg/helper-fp8-defs.h
create mode 100644 tests/tcg/aarch64/mte-10.c
create mode 100644 tests/tcg/aarch64/mte-9.c