[v3] hw/i3c: fix DW-I3C FIFO depth advertisement

[PATCH v3 0/3] hw/i3c: fix DW-I3C FIFO depth advertisement

Jithu Joseph posted 3 patches 3 days, 6 hours ago

Diff against v1 v2
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260604142207.2118098-1-jithu.joseph@oss.qualcomm.com

Maintainers: Joe Komlodi <komlodi@google.com>, "Cédric Le Goater" <clg@kaod.org>, Jamin Lin <jamin_lin@aspeedtech.com>, Nabih Estefan <nabihestefan@google.com>

include/hw/i3c/dw-i3c.h |  6 ++---
hw/i3c/dw-i3c.c         | 58 +++++++++++++++++++++++++++++++----------
2 files changed, 47 insertions(+), 17 deletions(-)

Expand all Fold all

[PATCH v3 0/3] hw/i3c: fix DW-I3C FIFO depth advertisement

Posted by Jithu Joseph 3 days, 6 hours ago

This series corrects the DesignWare I3C controller's advertised CMD/data
FIFO depths and cleans up the misleading queue-capacity field names that
made the bug easy to overlook.

The Linux DW-I3C master driver reads QUEUE_STATUS_LEVEL and
DATA_BUFFER_STATUS_LEVEL at probe to learn the controller's queue depths,
then rejects any transfer larger than what was advertised with
-EOPNOTSUPP.  QEMU was resetting these registers to 0x02 / 0x10 instead of
the real 0x10 / 0x40, so the guest believed the controller could only do
64-byte transfers and failed any I3C transfer with a payload larger than
64 B.  The backing FIFOs were already allocated at the correct size; only
the advertised reset values were wrong.

Patch 1 fixes the reset values, and additionally drives the advertised
depths from the queue-capacity configs in the reset handlers (per
Philippe's review) so a configured override is no longer silently ignored.
Patch 2 is a no-functional-change cleanup renaming the queue-capacity
struct fields and device properties from _bytes to _words, since the
values are word counts passed to fifo32_create() -- the old names were
what made the depth bug slow to spot.  Patch 3 keeps the old _bytes
property names working as aliases, since they are user-visible and shipped
in v11.0.0.

Patch 1 is the actual bug fix and is tagged Cc: qemu-stable; it is kept
self-contained (using the _bytes field names that exist in released
branches) so it cherry-picks cleanly.  Patches 2 and 3 are master-only
cleanup.

Note on the IBI queue capacity: unlike the cmd/resp and tx/rx capacities,
it is not advertised to the guest through any status register (the
hardware exposes only IBI occupancy via IBI_BUF_BLR / IBI_STATUS_CNT, not
a depth), so it sizes only the internal fifo32 backing store and has no
entry in dw_i3c_resets[].

Changes since v2:
 - Resent as a new thread to fix b4 trailer collection (Cédric Le Goater).
 - Added Reviewed-by from Jamin Lin to all three patches.
 - v2: https://lore.kernel.org/qemu-devel/20260604000734.1094382-1-jithu.joseph@oss.qualcomm.com/

Changes since v1:
 - Patch 1: drive QUEUE_STATUS_LEVEL / DATA_BUFFER_STATUS_LEVEL from the
   queue-capacity configs in the reset handlers, in addition to correcting
   the reset-array values (Philippe Mathieu-Daude).
 - New patch 3: keep the renamed _bytes properties working as aliases so
   existing command lines do not break (Philippe Mathieu-Daude).
 - v1: https://lore.kernel.org/qemu-devel/20260529014034.864722-1-jithu.joseph@oss.qualcomm.com/

Jithu Joseph (3):
  hw/i3c: fix CMD/data FIFO depth reset values to match real silicon
  hw/i3c: rename DW-I3C queue capacity fields from _bytes to _words
  hw/i3c: keep _bytes aliases for renamed queue-capacity properties

 include/hw/i3c/dw-i3c.h |  6 ++---
 hw/i3c/dw-i3c.c         | 58 +++++++++++++++++++++++++++++++----------
 2 files changed, 47 insertions(+), 17 deletions(-)


base-commit: 2db91528542672cf0db78b3f2cc0e22b36302b38
-- 
2.43.0