hw/pci-host/meson.build | 2 + hw/pci-host/pnv_phb4.c | 6 --- hw/pci-host/pnv_phb4_pec.c | 58 ------------------------- hw/pci-host/pnv_phb5.c | 23 ++++++++++ hw/pci-host/pnv_phb5_pec.c | 89 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 114 insertions(+), 64 deletions(-) create mode 100644 hw/pci-host/pnv_phb5.c create mode 100644 hw/pci-host/pnv_phb5_pec.c
Separate Power10/11 PHB5 implementation from Power9 PHB4 code for
better maintainability and clarity. This is a pure code movement
with no functional changes.
Signed-off-by: Jishnu Warrier <jishnuvw@linux.ibm.com>
---
hw/pci-host/meson.build | 2 +
hw/pci-host/pnv_phb4.c | 6 ---
hw/pci-host/pnv_phb4_pec.c | 58 -------------------------
hw/pci-host/pnv_phb5.c | 23 ++++++++++
hw/pci-host/pnv_phb5_pec.c | 89 ++++++++++++++++++++++++++++++++++++++
5 files changed, 114 insertions(+), 64 deletions(-)
create mode 100644 hw/pci-host/pnv_phb5.c
create mode 100644 hw/pci-host/pnv_phb5_pec.c
diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build
index 86b754d0b0..3217e7e912 100644
--- a/hw/pci-host/meson.build
+++ b/hw/pci-host/meson.build
@@ -44,5 +44,7 @@ specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files(
'pnv_phb3_pbcq.c',
'pnv_phb4.c',
'pnv_phb4_pec.c',
+ 'pnv_phb5.c',
+ 'pnv_phb5_pec.c',
'pnv_phb.c',
))
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 396bc47817..705a5bcf07 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1721,11 +1721,6 @@ static const TypeInfo pnv_phb4_type_info = {
}
};
-static const TypeInfo pnv_phb5_type_info = {
- .name = TYPE_PNV_PHB5,
- .parent = TYPE_PNV_PHB4,
- .instance_size = sizeof(PnvPHB4),
-};
static void pnv_phb4_root_bus_get_prop(Object *obj, Visitor *v,
const char *name,
@@ -1794,7 +1789,6 @@ static void pnv_phb4_register_types(void)
{
type_register_static(&pnv_phb4_root_bus_info);
type_register_static(&pnv_phb4_type_info);
- type_register_static(&pnv_phb5_type_info);
type_register_static(&pnv_phb4_iommu_memory_region_info);
}
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index 58ec14ec2f..ee5cdc3e45 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -394,67 +394,9 @@ static const TypeInfo pnv_pec_type_info = {
}
};
-/*
- * POWER10 definitions
- */
-static uint32_t pnv_phb5_pec_xscom_cplt_base(PnvPhb4PecState *pec)
-{
- return PNV10_XSCOM_PEC_NEST_CPLT_BASE + XPEC_PCI_CPLT_OFFSET * pec->index;
-}
-
-static uint32_t pnv_phb5_pec_xscom_pci_base(PnvPhb4PecState *pec)
-{
- return PNV10_XSCOM_PEC_PCI_BASE + 0x1000000 * pec->index;
-}
-
-static uint32_t pnv_phb5_pec_xscom_nest_base(PnvPhb4PecState *pec)
-{
- /* index goes down ... */
- return PNV10_XSCOM_PEC_NEST_BASE - 0x1000000 * pec->index;
-}
-
-/*
- * PEC0 -> 3 stacks
- * PEC1 -> 3 stacks
- */
-static const uint32_t pnv_phb5_pec_num_stacks[] = { 3, 3 };
-
-static void pnv_phb5_pec_class_init(ObjectClass *klass, const void *data)
-{
- PnvPhb4PecClass *pecc = PNV_PHB4_PEC_CLASS(klass);
- static const char compat[] = "ibm,power10-pbcq";
- static const char stk_compat[] = "ibm,power10-phb-stack";
-
- pecc->xscom_cplt_base = pnv_phb5_pec_xscom_cplt_base;
- pecc->xscom_nest_base = pnv_phb5_pec_xscom_nest_base;
- pecc->xscom_pci_base = pnv_phb5_pec_xscom_pci_base;
- pecc->xscom_nest_size = PNV10_XSCOM_PEC_NEST_SIZE;
- pecc->xscom_pci_size = PNV10_XSCOM_PEC_PCI_SIZE;
- pecc->compat = compat;
- pecc->compat_size = sizeof(compat);
- pecc->stk_compat = stk_compat;
- pecc->stk_compat_size = sizeof(stk_compat);
- pecc->version = PNV_PHB5_VERSION;
- pecc->phb_type = TYPE_PNV_PHB5;
- pecc->num_phbs = pnv_phb5_pec_num_stacks;
-}
-
-static const TypeInfo pnv_phb5_pec_type_info = {
- .name = TYPE_PNV_PHB5_PEC,
- .parent = TYPE_PNV_PHB4_PEC,
- .instance_size = sizeof(PnvPhb4PecState),
- .class_init = pnv_phb5_pec_class_init,
- .class_size = sizeof(PnvPhb4PecClass),
- .interfaces = (const InterfaceInfo[]) {
- { TYPE_PNV_XSCOM_INTERFACE },
- { }
- }
-};
-
static void pnv_pec_register_types(void)
{
type_register_static(&pnv_pec_type_info);
- type_register_static(&pnv_phb5_pec_type_info);
}
type_init(pnv_pec_register_types);
diff --git a/hw/pci-host/pnv_phb5.c b/hw/pci-host/pnv_phb5.c
new file mode 100644
index 0000000000..4b72539cec
--- /dev/null
+++ b/hw/pci-host/pnv_phb5.c
@@ -0,0 +1,23 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * QEMU PowerPC PowerNV (POWER10) PHB5 model
+ *
+ * Copyright (c) 2018-2026, IBM Corporation.
+ */
+#include "qemu/osdep.h"
+#include "hw/pci-host/pnv_phb4.h"
+#include "qom/object.h"
+
+static const TypeInfo pnv_phb5_type_info = {
+ .name = TYPE_PNV_PHB5,
+ .parent = TYPE_PNV_PHB4,
+ .instance_size = sizeof(PnvPHB4),
+};
+
+static void pnv_phb5_register_types(void)
+{
+ type_register_static(&pnv_phb5_type_info);
+}
+
+type_init(pnv_phb5_register_types);
diff --git a/hw/pci-host/pnv_phb5_pec.c b/hw/pci-host/pnv_phb5_pec.c
new file mode 100644
index 0000000000..d48bc09b8b
--- /dev/null
+++ b/hw/pci-host/pnv_phb5_pec.c
@@ -0,0 +1,89 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * QEMU PowerPC PowerNV (POWER10) PHB5 PEC model
+ *
+ * Copyright (c) 2018-2026, IBM Corporation.
+ */
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/log.h"
+#include "target/ppc/cpu.h"
+#include "hw/ppc/fdt.h"
+#include "hw/pci-host/pnv_phb4_regs.h"
+#include "hw/pci-host/pnv_phb4.h"
+#include "hw/ppc/pnv_xscom.h"
+#include "hw/pci/pci_bridge.h"
+#include "hw/pci/pci_bus.h"
+#include "hw/ppc/pnv.h"
+#include "hw/ppc/pnv_chip.h"
+#include "hw/core/qdev-properties.h"
+#include "system/system.h"
+
+#include <libfdt.h>
+
+#define XPEC_PCI_CPLT_OFFSET 0x1000000ULL
+
+/*
+ * POWER10 definitions
+ */
+static uint32_t pnv_phb5_pec_xscom_cplt_base(PnvPhb4PecState *pec)
+{
+ return PNV10_XSCOM_PEC_NEST_CPLT_BASE + XPEC_PCI_CPLT_OFFSET * pec->index;
+}
+
+static uint32_t pnv_phb5_pec_xscom_pci_base(PnvPhb4PecState *pec)
+{
+ return PNV10_XSCOM_PEC_PCI_BASE + 0x1000000 * pec->index;
+}
+
+static uint32_t pnv_phb5_pec_xscom_nest_base(PnvPhb4PecState *pec)
+{
+ /* index goes down ... */
+ return PNV10_XSCOM_PEC_NEST_BASE - 0x1000000 * pec->index;
+}
+
+/*
+ * PEC0 -> 3 stacks
+ * PEC1 -> 3 stacks
+ */
+static const uint32_t pnv_phb5_pec_num_stacks[] = { 3, 3 };
+
+static void pnv_phb5_pec_class_init(ObjectClass *klass, const void *data)
+{
+ PnvPhb4PecClass *pecc = PNV_PHB4_PEC_CLASS(klass);
+ static const char compat[] = "ibm,power10-pbcq";
+ static const char stk_compat[] = "ibm,power10-phb-stack";
+
+ pecc->xscom_cplt_base = pnv_phb5_pec_xscom_cplt_base;
+ pecc->xscom_nest_base = pnv_phb5_pec_xscom_nest_base;
+ pecc->xscom_pci_base = pnv_phb5_pec_xscom_pci_base;
+ pecc->xscom_nest_size = PNV10_XSCOM_PEC_NEST_SIZE;
+ pecc->xscom_pci_size = PNV10_XSCOM_PEC_PCI_SIZE;
+ pecc->compat = compat;
+ pecc->compat_size = sizeof(compat);
+ pecc->stk_compat = stk_compat;
+ pecc->stk_compat_size = sizeof(stk_compat);
+ pecc->version = PNV_PHB5_VERSION;
+ pecc->phb_type = TYPE_PNV_PHB5;
+ pecc->num_phbs = pnv_phb5_pec_num_stacks;
+}
+
+static const TypeInfo pnv_phb5_pec_type_info = {
+ .name = TYPE_PNV_PHB5_PEC,
+ .parent = TYPE_PNV_PHB4_PEC,
+ .instance_size = sizeof(PnvPhb4PecState),
+ .class_init = pnv_phb5_pec_class_init,
+ .class_size = sizeof(PnvPhb4PecClass),
+ .interfaces = (const InterfaceInfo[]) {
+ { TYPE_PNV_XSCOM_INTERFACE },
+ { }
+ }
+};
+
+static void pnv_phb5_pec_register_types(void)
+{
+ type_register_static(&pnv_phb5_pec_type_info);
+}
+
+type_init(pnv_phb5_pec_register_types);
--
2.53.0
Thanks for this patch jishnu
On 01/06/26 21:48, Jishnu Warrier wrote:
> Separate Power10/11 PHB5 implementation from Power9 PHB4 code for
> better maintainability and clarity. This is a pure code movement
> with no functional changes.
>
> Signed-off-by: Jishnu Warrier <jishnuvw@linux.ibm.com>
> <...snip...>
>
> +/*
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + *
> + * QEMU PowerPC PowerNV (POWER10) PHB5 model
> + *
> + * Copyright (c) 2018-2026, IBM Corporation.
> + */
minor nit: generally the file description is at the top, SPDX line can
go at the end of comment
> +#include "qemu/osdep.h"
> +#include "hw/pci-host/pnv_phb4.h"
> +#include "qom/object.h"
> +
> +static const TypeInfo pnv_phb5_type_info = {
> + .name = TYPE_PNV_PHB5,
> + .parent = TYPE_PNV_PHB4,
> + .instance_size = sizeof(PnvPHB4),
> +};
> +
> +static void pnv_phb5_register_types(void)
> +{
> + type_register_static(&pnv_phb5_type_info);
> +}
> +
> +type_init(pnv_phb5_register_types);
> diff --git a/hw/pci-host/pnv_phb5_pec.c b/hw/pci-host/pnv_phb5_pec.c
> new file mode 100644
> index 0000000000..d48bc09b8b
> --- /dev/null
> +++ b/hw/pci-host/pnv_phb5_pec.c
> @@ -0,0 +1,89 @@
> +/*
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + *
> + * QEMU PowerPC PowerNV (POWER10) PHB5 PEC model
> + *
> + * Copyright (c) 2018-2026, IBM Corporation.
> + */
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "qemu/log.h"
> +#include "target/ppc/cpu.h"
> +#include "hw/ppc/fdt.h"
> +#include "hw/pci-host/pnv_phb4_regs.h"
> +#include "hw/pci-host/pnv_phb4.h"
> +#include "hw/ppc/pnv_xscom.h"
> +#include "hw/pci/pci_bridge.h"
> +#include "hw/pci/pci_bus.h"
> +#include "hw/ppc/pnv.h"
> +#include "hw/ppc/pnv_chip.h"
> +#include "hw/core/qdev-properties.h"
> +#include "system/system.h"
> +
> +#include <libfdt.h>
nit: fdt related and other headers are not required, for me, below
includes look enough:
#include "qemu/osdep.h"
#include "hw/pci-host/pnv_phb4.h"
#include "hw/ppc/pnv_xscom.h"
similarly qom/object.h isn't required in pnv_phb5.c
rest of the code looks good to me.
Thanks,
- Aditya G
© 2016 - 2026 Red Hat, Inc.