This series corrects the DesignWare I3C controller's advertised
CMD/data FIFO depths and cleans up the misleading field names that
made the bug easy to overlook.

The Linux DW-I3C master driver reads QUEUE_STATUS_LEVEL and
DATA_BUFFER_STATUS_LEVEL at probe to learn the controller's queue
depths, then rejects any transfer larger than what was advertised with
-EOPNOTSUPP.  QEMU was resetting these registers to 0x02 / 0x10 instead
of the real 0x10 / 0x40, so the guest believed the controller could
only do 64-byte transfers and failed any I3C transfer with a payload
larger than 64 B.  The backing FIFOs were already allocated at the
correct size; only the advertised reset values were wrong.

Patch 1 fixes the reset values.  Patch 2 is a no-functional-change
cleanup renaming the queue-capacity struct fields and device
properties from _bytes to _words, since the values are word counts
passed to fifo32_create() -- the old names were what made the depth
bug slow to spot.

Jithu Joseph (2):
  hw/i3c: fix CMD/data FIFO depth reset values to match real silicon
  hw/i3c: rename DW-I3C queue capacity fields from _bytes to _words

 include/hw/i3c/dw-i3c.h |  6 +++---
 hw/i3c/dw-i3c.c         | 28 ++++++++++++++--------------
 2 files changed, 17 insertions(+), 17 deletions(-)


base-commit: 2db91528542672cf0db78b3f2cc0e22b36302b38
-- 
2.43.0