On Thu, 28 May 2026 at 19:19, Jason Wright <wrigjl@proton.me> wrote:
>
> Implement FEAT_RNG_TRAP for RNDR/RNDRRS and enable it on cortex-max.
>
> v3:
> - helper.c: give ID_AA64ISAR0_EL1 a readfn so that ID_AA64ISAR0_EL1.RNDR
> reads as 1 whenever SCR_EL3.TRNDR is set, regardless of whether
> FEAT_RNG is implemented (Peter Maydell)
> - cpu64.c: keep the ID_AA64PFR1 fields in register bit-field order;
> RNDR_TRAP now sits after SME and before CSV2_FRAC (Peter Maydell)
> - docs: list FEAT_RNG_TRAP in docs/system/arm/emulation.rst (Peter
> Maydell)
>
> v2:
> - access_rndr: return CP_ACCESS_UNDEFINED when FEAT_RNG_TRAP is
> present but FEAT_RNG is not and the trap is disabled (Richard
> Henderson)
> - Register rndr_reginfo when either FEAT_RNG or FEAT_RNG_TRAP is
> implemented, not only FEAT_RNG (Richard Henderson)
> - Fix document number typo in Patch 1 commit message
>
> Jason Wright (2):
> target/arm: implement FEAT_RNG_TRAP for RNDR/RNDRRS
> target/arm: advertise FEAT_RNG_TRAP on cortex-max
Applied to target-arm.next, thanks.
-- PMM