[PATCH v3 0/2] target/arm: implement FEAT_RNG_TRAP

Jason Wright posted 2 patches 1 day, 22 hours ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260528181857.92087-1-wrigjl@proton.me
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
docs/system/arm/emulation.rst |  1 +
target/arm/cpu-features.h     |  5 +++
target/arm/helper.c           | 58 ++++++++++++++++++++++++++++++++---
target/arm/tcg/cpu64.c        |  1 +
4 files changed, 60 insertions(+), 5 deletions(-)
[PATCH v3 0/2] target/arm: implement FEAT_RNG_TRAP
Posted by Jason Wright 1 day, 22 hours ago
Implement FEAT_RNG_TRAP for RNDR/RNDRRS and enable it on cortex-max.

v3:
  - helper.c: give ID_AA64ISAR0_EL1 a readfn so that ID_AA64ISAR0_EL1.RNDR
    reads as 1 whenever SCR_EL3.TRNDR is set, regardless of whether
    FEAT_RNG is implemented (Peter Maydell)
  - cpu64.c: keep the ID_AA64PFR1 fields in register bit-field order;
    RNDR_TRAP now sits after SME and before CSV2_FRAC (Peter Maydell)
  - docs: list FEAT_RNG_TRAP in docs/system/arm/emulation.rst (Peter
    Maydell)

v2:
  - access_rndr: return CP_ACCESS_UNDEFINED when FEAT_RNG_TRAP is
    present but FEAT_RNG is not and the trap is disabled (Richard
    Henderson)
  - Register rndr_reginfo when either FEAT_RNG or FEAT_RNG_TRAP is
    implemented, not only FEAT_RNG (Richard Henderson)
  - Fix document number typo in Patch 1 commit message

Jason Wright (2):
  target/arm: implement FEAT_RNG_TRAP for RNDR/RNDRRS
  target/arm: advertise FEAT_RNG_TRAP on cortex-max

 docs/system/arm/emulation.rst |  1 +
 target/arm/cpu-features.h     |  5 +++
 target/arm/helper.c           | 58 ++++++++++++++++++++++++++++++++---
 target/arm/tcg/cpu64.c        |  1 +
 4 files changed, 60 insertions(+), 5 deletions(-)

-- 
2.50.1 (Apple Git-155)
Re: [PATCH v3 0/2] target/arm: implement FEAT_RNG_TRAP
Posted by Peter Maydell 1 day, 8 hours ago
On Thu, 28 May 2026 at 19:19, Jason Wright <wrigjl@proton.me> wrote:
>
> Implement FEAT_RNG_TRAP for RNDR/RNDRRS and enable it on cortex-max.
>
> v3:
>   - helper.c: give ID_AA64ISAR0_EL1 a readfn so that ID_AA64ISAR0_EL1.RNDR
>     reads as 1 whenever SCR_EL3.TRNDR is set, regardless of whether
>     FEAT_RNG is implemented (Peter Maydell)
>   - cpu64.c: keep the ID_AA64PFR1 fields in register bit-field order;
>     RNDR_TRAP now sits after SME and before CSV2_FRAC (Peter Maydell)
>   - docs: list FEAT_RNG_TRAP in docs/system/arm/emulation.rst (Peter
>     Maydell)
>
> v2:
>   - access_rndr: return CP_ACCESS_UNDEFINED when FEAT_RNG_TRAP is
>     present but FEAT_RNG is not and the trap is disabled (Richard
>     Henderson)
>   - Register rndr_reginfo when either FEAT_RNG or FEAT_RNG_TRAP is
>     implemented, not only FEAT_RNG (Richard Henderson)
>   - Fix document number typo in Patch 1 commit message
>
> Jason Wright (2):
>   target/arm: implement FEAT_RNG_TRAP for RNDR/RNDRRS
>   target/arm: advertise FEAT_RNG_TRAP on cortex-max



Applied to target-arm.next, thanks.

-- PMM