Hi; here's another arm pullreq. This one has in it some
bugfix/cleanup/refactoring bits and pieces from me, and the
first third of Richard's FP8 emulation work.

thanks
-- PMM

The following changes since commit cbf877d67a812be17a9ce404a589e1bdf722c1f6:

  Merge tag 'pbouvier/pr/docs-20260522' of https://gitlab.com/p-b-o/qemu into staging (2026-05-24 07:45:19 -0400)

are available in the Git repository at:

  https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20260526

for you to fetch changes up to 1574211d1fd2052e90ede8865901c48fb391b132:

  target/arm: Move vectors_overlap to vec_internal.h (2026-05-26 11:41:00 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/timer/mss_timer: Remove dead code in timer_write()
 * OMAP: Remove various pieces of dead code
 * target/arm: Set debug in attrs in translate_for_debug()
 * target/arm/ptw: Flip sense of get_phys_addr_* return values
 * tests/functional/aarch64: Bump up timeout on vbsa
 * target/arm: Fix minor FEAT_AFP corner case bugs
 * target/arm: Implement FEAT_FAMINMAX
 * target/arm: Implement FEAT_FPMR
 * target/arm: Some initial patches towards other FP8 features

----------------------------------------------------------------
Peter Maydell (31):
      hw/timer/mss_timer: Remove dead code in timer_write()
      hw/arm/omap: Remove omap_mpu_model remnants
      hw/arm/omap: Remove unused omap_mpuio functions
      hw/arm/omap: Remove stray unused prototype
      hw/arm/omap: Remove unused omap1_dma_irq_map[] entries
      hw/arm/omap: Delete unused #defines
      hw/arm/omap: Remove unused wakeup irq
      hw/dma/omap_dma: Remove support for dma_3_0 and dma_3_2
      hw/dma/omap_dma: Fold omap_dma_sys_read() and omap_dma_sys_write() into callers
      hw/dma/omap_dma: Remove omap_3_1_compatible_disable flag
      hw/dma/omap_dma: Remove 3.1 mapping handling
      hw/dma/omap_dma: Drop model argument to omap_dma_init()
      target/arm: Set debug in attrs in translate_for_debug()
      target/arm/ptw: Flip sense of get_phys_addr_disabled return value
      target/arm/ptw: Flip sense of get_phys_addr_lpae return value
      target/arm/ptw: Flip sense of get_phys_addr_v6 return value
      target/arm/ptw: Flip sense of get_phys_addr_v5 return value
      target/arm/ptw: Flip sense of get_phys_addr_psmav5 return value
      target/arm/ptw: Flip sense of get_phys_addr_pmsav7 return value
      target/arm/ptw: Flip sense of get_phys_addr_pmsav8 return value
      target/arm/ptw: Flip sense of pmsav8_mpu_lookup return value
      target/arm/ptw: Flip sense of get_phys_addr_twostage return value
      target/arm/ptw: Flip sense of get_phys_addr_nogpc return value
      target/arm/ptw: Flip sense of get_phys_addr_gpc return value
      target/arm/ptw: Flip sense of arm_cpu_get_phys_addr return value
      target/arm/ptw: Flip sense of get_phys_addr_for_at return value
      target/arm/ptw: Flip sense of get_phys_addr return value
      tests/functional/aarch64: Bump up timeout on vbsa
      target/arm: SVE2 FMAXP, FMINP must honour AH=1
      target/arm: Use FPST_A64_F16 for SVE FCVTLT_hs
      target/arm: Set correct fp flags for FLOGB when FPCR.AH = 1

Pierrick Bouvier (1):
      tests/functional/aarch64/rme: update images to support FEAT_FP8

Richard Henderson (22):
      target/arm: Implement ID_AA64ISAR3
      target/arm: Implement FEAT_FAMINMAX for AdvSIMD
      target/arm: Implement FEAT_FAMINMAX for SME
      target/arm: Implement FEAT_FAMINMAX for SVE
      target/arm: Enable FEAT_FAMINMAX for -cpu max
      target/arm: Update SCR bits for Arm ARM M.a.a
      target/arm: Update HCRX bits for Arm ARM M.a.a
      target/arm: Introduce FPMR
      target/arm: Update SCTLR bits for FEAT_FPMR
      target/arm: Enable EnFPM bits for FEAT_FPMR
      target/arm: Clear FPMR on ResetSVEState
      target/arm: Add FPMR_EL to TBFLAGS
      target/arm: Trap direct acceses to FPMR
      target/arm: Dump FPMR when present
      linux-user/aarch64: Implement FPMR signal frames
      target/arm: Enable FEAT_FPMR for -cpu max
      target/arm: Implement ID_AA64FPFR0
      target/arm: Add isar_feature_aa64_f8cvt
      target/arm: Implement FSCALE for AdvSIMD
      target/arm: Implement FSCALE for SME
      target/arm: Split vector-type.h from cpu.h
      target/arm: Move vectors_overlap to vec_internal.h

 docs/system/arm/emulation.rst                |   2 +
 hw/arm/omap1.c                               |  84 +---
 hw/dma/omap_dma.c                            | 584 +++------------------------
 hw/gpio/omap_gpio.c                          |   6 -
 hw/misc/omap_clk.c                           |   9 +-
 hw/timer/mss-timer.c                         |  13 +-
 include/hw/arm/omap.h                        | 252 +-----------
 linux-user/aarch64/elfload.c                 |   2 +
 linux-user/aarch64/signal.c                  |  44 +-
 target/arm/cpregs.h                          |   5 +
 target/arm/cpu-features.h                    |  54 +++
 target/arm/cpu-sysregs.h.inc                 |   2 +
 target/arm/cpu.c                             |  11 +-
 target/arm/cpu.h                             |  52 +--
 target/arm/helper.c                          |  43 +-
 target/arm/internals.h                       |  17 +-
 target/arm/machine.c                         |  20 +
 target/arm/ptw.c                             |  83 ++--
 target/arm/tcg/a64.decode                    |   8 +
 target/arm/tcg/cpregs-at.c                   |  12 +-
 target/arm/tcg/cpu64.c                       |   8 +
 target/arm/tcg/helper-a64-defs.h             |  11 +
 target/arm/tcg/helper-sve-defs.h             |  28 ++
 target/arm/tcg/hflags.c                      |  42 ++
 target/arm/tcg/m_helper.c                    |   8 +-
 target/arm/tcg/sme.decode                    |  11 +
 target/arm/tcg/sme_helper.c                  |   6 -
 target/arm/tcg/sve.decode                    |   2 +
 target/arm/tcg/sve_helper.c                  |  25 +-
 target/arm/tcg/tlb_helper.c                  |   6 +-
 target/arm/tcg/translate-a64.c               |  26 ++
 target/arm/tcg/translate-sme.c               |  38 +-
 target/arm/tcg/translate-sve.c               |  26 +-
 target/arm/tcg/translate.h                   |  14 +
 target/arm/tcg/vec_helper64.c                |  42 ++
 target/arm/tcg/vec_internal.h                |  21 +
 target/arm/vector-type.h                     |  44 ++
 tests/functional/aarch64/meson.build         |   1 +
 tests/functional/aarch64/test_rme_sbsaref.py |   7 +-
 tests/functional/aarch64/test_rme_virt.py    |   7 +-
 40 files changed, 678 insertions(+), 998 deletions(-)
 create mode 100644 target/arm/vector-type.h

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.