linux-user/hppa/elfload.c | 13 +++++++++++++ linux-user/hppa/target_elf.h | 21 +++++++++++++++++++++ 2 files changed, 34 insertions(+)
Add HAVE_ELF_CORE_DUMP, target_elf_gregset_t (80 entries matching
arch/parisc/include/uapi/asm/ptrace.h), and elf_core_copy_regs().
The struct layout matches the kernel's struct user_regs_struct:
gr[0..31] at indices [0..31] (PSW in gr[0])
sr[0..7] at indices [32..39]
iaoq[0..1] at indices [40..41] (instruction address queue)
iasq[0..1] at indices [42..43]
sar at index [44] (shift amount / CR11)
iir at index [45] (interrupt instruction register)
isr at index [46] (interrupt space register)
ior at index [47] (interrupt offset register)
ipsw at index [48] (interrupt PSW / CR22)
cr0 at index [49] (recovery counter)
cr24_31[8] at indices [50..57]
cr8_15[6] at indices [58..63]
pad[16] at indices [64..79]
elf_core_copy_regs() saves GRs, IAOQ (front/back), and SAR.
Signed-off-by: Matt Turner <mattst88@gmail.com>
---
I don't know if this is something that can go to stable?
linux-user/hppa/elfload.c | 13 +++++++++++++
linux-user/hppa/target_elf.h | 21 +++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git ./linux-user/hppa/elfload.c ./linux-user/hppa/elfload.c
index 7f7ece6dc1..3354e1b840 100644
--- ./linux-user/hppa/elfload.c
+++ ./linux-user/hppa/elfload.c
@@ -16,6 +16,19 @@ const char *get_elf_platform(CPUState *cs)
return "PARISC";
}
+void elf_core_copy_regs(target_elf_gregset_t *r, const CPUArchState *env)
+{
+ int i;
+
+ memset(r, 0, sizeof(*r));
+ for (i = 0; i < 32; i++) {
+ r->gr[i] = tswapal(env->gr[i]);
+ }
+ r->iaoq[0] = tswapal(env->iaoq_f);
+ r->iaoq[1] = tswapal(env->iaoq_b);
+ r->sar = tswapal(env->cr[CR_SAR]);
+}
+
bool init_guest_commpage(void)
{
/* If reserved_va, then we have already mapped 0 page on the host. */
diff --git ./linux-user/hppa/target_elf.h ./linux-user/hppa/target_elf.h
index 76930c9369..e1c5033242 100644
--- ./linux-user/hppa/target_elf.h
+++ ./linux-user/hppa/target_elf.h
@@ -12,6 +12,27 @@
#define ELF_MACHINE EM_PARISC
#define HAVE_ELF_PLATFORM 1
+#define HAVE_ELF_CORE_DUMP 1
+
+/*
+ * Matches struct user_regs_struct from arch/parisc/include/uapi/asm/ptrace.h.
+ * ELF_NGREG = 80; register indices match those used by libunwind and gdb.
+ */
+typedef struct target_elf_gregset_t {
+ abi_ulong gr[32]; /* gr[0..31]; PSW in gr[0] [0..31] */
+ abi_ulong sr[8]; /* space registers [32..39] */
+ abi_ulong iaoq[2]; /* instruction address offset [40..41] */
+ abi_ulong iasq[2]; /* instruction address space [42..43] */
+ abi_ulong sar; /* shift amount register (CR11) [44] */
+ abi_ulong iir; /* interrupt instruction register [45] */
+ abi_ulong isr; /* interrupt space register [46] */
+ abi_ulong ior; /* interrupt offset register [47] */
+ abi_ulong ipsw; /* interrupt PSW (CR22) [48] */
+ abi_ulong cr0; /* recovery counter [49] */
+ abi_ulong cr24_31[8]; /* cr24..cr31 [50..57] */
+ abi_ulong cr8_15[6]; /* cr8, cr9, cr12, cr13, cr10, cr15 [58..63] */
+ abi_ulong pad[16]; /* pad to 80 elements [64..79] */
+} target_elf_gregset_t;
#define LO_COMMPAGE 0
#define STACK_GROWS_DOWN 0
--
2.53.0
On 5/21/26 07:56, Matt Turner wrote: > Add HAVE_ELF_CORE_DUMP, target_elf_gregset_t (80 entries matching > arch/parisc/include/uapi/asm/ptrace.h), and elf_core_copy_regs(). > > The struct layout matches the kernel's struct user_regs_struct: > gr[0..31] at indices [0..31] (PSW in gr[0]) > sr[0..7] at indices [32..39] > iaoq[0..1] at indices [40..41] (instruction address queue) > iasq[0..1] at indices [42..43] > sar at index [44] (shift amount / CR11) > iir at index [45] (interrupt instruction register) > isr at index [46] (interrupt space register) > ior at index [47] (interrupt offset register) > ipsw at index [48] (interrupt PSW / CR22) > cr0 at index [49] (recovery counter) > cr24_31[8] at indices [50..57] > cr8_15[6] at indices [58..63] > pad[16] at indices [64..79] > > elf_core_copy_regs() saves GRs, IAOQ (front/back), and SAR. > > Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Helge Deller <deller@gmx.de> Added to linux-user-next git tree. Thanks! Helge
© 2016 - 2026 Red Hat, Inc.