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[PATCH v6 00/20] single-binary: Make hw/arm/ common

Philippe Mathieu-Daudé posted 20 patches 1 week, 5 days ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260515141032.3271-1-philmd@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>, "Cédric Le Goater" <clg@kaod.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Kane Chen <kane_chen@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>, "Philippe Mathieu-Daudé" <philmd@linaro.org>
There is a newer version of this series
include/hw/arm/armv7m.h                    |   2 +-
include/hw/misc/tz-msc.h                   |   2 +-
target/arm/internals.h                     |  10 +-
target/arm/{ => tcg}/idau.h                |   4 +-
hw/arm/armv7m.c                            |   2 +-
hw/arm/aspeed_ast27x0.c                    |   7 +-
hw/arm/bcm2836.c                           |  14 +-
hw/arm/raspi.c                             |   4 -
target/arm/cpu-max.c                       | 241 +++++++++++++++++++++
target/arm/cpu.c                           |  10 +-
target/arm/cpu32-stubs.c                   |   8 +-
target/arm/cpu64.c                         |  92 +-------
target/arm/ptw.c                           |   2 +-
target/arm/tcg/cpu-v7m.c                   |  11 +
target/arm/tcg/{cpu32.c => cpu32-system.c} | 191 +---------------
target/arm/tcg/stubs32.c                   |  10 +
hw/arm/meson.build                         |  15 +-
hw/intc/meson.build                        |   2 +-
target/arm/meson.build                     |  26 ++-
target/arm/tcg/meson.build                 |  60 ++---
20 files changed, 349 insertions(+), 364 deletions(-)
rename target/arm/{ => tcg}/idau.h (97%)
create mode 100644 target/arm/cpu-max.c
rename target/arm/tcg/{cpu32.c => cpu32-system.c} (80%)
[PATCH v6 00/20] single-binary: Make hw/arm/ common
Posted by Philippe Mathieu-Daudé 1 week, 5 days ago 
Since v5:
- Unify 'max' CPU type (rth, pm215)

Since v4:
- Add DEFINE_MACHINE_WITH_INTERFACES (Zoltan)
- Use GPtrArray for get_valid_cpu_type (Richard)
- Define InterfaceInfo[] arrays (Richard)
- Collect R-b tags

Since v3:
- QAPI structure renamed as QemuTargetInfo
- MachineClass::get_valid_cpu_types() runtime
- target_aarch64() checking SysEmuTarget value
- Remove CONFIG_TCG #ifdef'ry in hw/arm/

Since v2:
- More comments from Pierrick addressed
- Use GList to register valid CPUs list
- Remove all TARGET_AARCH64 uses in hw/arm/

Since v1:
- Dropped unrelated / irrelevant patches
- Addressed Pierrick comments
- Added R-b tag
- Only considering machines, not CPUs.

Available here, based on my pending patch queue:
https://gitlab.com/philmd/qemu/-/tags/single-binary-hw-arm-rfc-v5

Philippe Mathieu-Daudé (20):
  hw/arm: Build ARM/HVF GICv3 stub once
  hw/arm/raspi: Initialize 64-bit CPU types during DeviceRealize()
  hw/arm/raspi: Build objects once
  hw/arm/aspeed: Initialize 64-bit CPU types during DeviceRealize()
  hw/arm/aspeed: Build objects once
  hw/arm/meson: Remove now unused arm_ss[] source set
  target/arm: Introduce common system/user meson source set
  target/arm: Build gdbstub64.o as common object
  target/arm: Build cpu64.o as common object
  target/arm: Restrict IDAU interface to TCG namespace
  target/arm: Rename Aarch64-specific methods
  target/arm: Extract common code related to 'max' CPU
  target/arm: Use make_ccsidr(LEGACY) in 32 bit 'max' CPU type
  target/arm: Implement DBGDEVID* registers in max AArch32 CPU
  target/arm: Only set %kvm_target when KVM is enabled
  target/arm: Factor aarch64_aa32_a57_init() out
  target/arm: Re-use common aarch64_aa32_a57_init() helper
  target/arm: Define 'max' CPU type in cpu-max.c
  target/arm: Build cpu32-system.o as common object
  target/arm: Build cpu-max.c once

 include/hw/arm/armv7m.h                    |   2 +-
 include/hw/misc/tz-msc.h                   |   2 +-
 target/arm/internals.h                     |  10 +-
 target/arm/{ => tcg}/idau.h                |   4 +-
 hw/arm/armv7m.c                            |   2 +-
 hw/arm/aspeed_ast27x0.c                    |   7 +-
 hw/arm/bcm2836.c                           |  14 +-
 hw/arm/raspi.c                             |   4 -
 target/arm/cpu-max.c                       | 241 +++++++++++++++++++++
 target/arm/cpu.c                           |  10 +-
 target/arm/cpu32-stubs.c                   |   8 +-
 target/arm/cpu64.c                         |  92 +-------
 target/arm/ptw.c                           |   2 +-
 target/arm/tcg/cpu-v7m.c                   |  11 +
 target/arm/tcg/{cpu32.c => cpu32-system.c} | 191 +---------------
 target/arm/tcg/stubs32.c                   |  10 +
 hw/arm/meson.build                         |  15 +-
 hw/intc/meson.build                        |   2 +-
 target/arm/meson.build                     |  26 ++-
 target/arm/tcg/meson.build                 |  60 ++---
 20 files changed, 349 insertions(+), 364 deletions(-)
 rename target/arm/{ => tcg}/idau.h (97%)
 create mode 100644 target/arm/cpu-max.c
 rename target/arm/tcg/{cpu32.c => cpu32-system.c} (80%)

-- 
2.53.0
Re: [PATCH v6 00/20] single-binary: Make hw/arm/ common
Posted by Pierrick Bouvier 1 week, 5 days ago 
On 5/15/2026 7:10 AM, Philippe Mathieu-Daudé wrote:
> Since v5:
> - Unify 'max' CPU type (rth, pm215)
> 
> Since v4:
> - Add DEFINE_MACHINE_WITH_INTERFACES (Zoltan)
> - Use GPtrArray for get_valid_cpu_type (Richard)
> - Define InterfaceInfo[] arrays (Richard)
> - Collect R-b tags
> 
> Since v3:
> - QAPI structure renamed as QemuTargetInfo
> - MachineClass::get_valid_cpu_types() runtime
> - target_aarch64() checking SysEmuTarget value
> - Remove CONFIG_TCG #ifdef'ry in hw/arm/
> 
> Since v2:
> - More comments from Pierrick addressed
> - Use GList to register valid CPUs list
> - Remove all TARGET_AARCH64 uses in hw/arm/
> 
> Since v1:
> - Dropped unrelated / irrelevant patches
> - Addressed Pierrick comments
> - Added R-b tag
> - Only considering machines, not CPUs.
> 
> Available here, based on my pending patch queue:
> https://gitlab.com/philmd/qemu/-/tags/single-binary-hw-arm-rfc-v5
> 
> Philippe Mathieu-Daudé (20):
>   hw/arm: Build ARM/HVF GICv3 stub once
>   hw/arm/raspi: Initialize 64-bit CPU types during DeviceRealize()
>   hw/arm/raspi: Build objects once
>   hw/arm/aspeed: Initialize 64-bit CPU types during DeviceRealize()
>   hw/arm/aspeed: Build objects once
>   hw/arm/meson: Remove now unused arm_ss[] source set
>   target/arm: Introduce common system/user meson source set
>   target/arm: Build gdbstub64.o as common object
>   target/arm: Build cpu64.o as common object
>   target/arm: Restrict IDAU interface to TCG namespace
>   target/arm: Rename Aarch64-specific methods
>   target/arm: Extract common code related to 'max' CPU
>   target/arm: Use make_ccsidr(LEGACY) in 32 bit 'max' CPU type
>   target/arm: Implement DBGDEVID* registers in max AArch32 CPU
>   target/arm: Only set %kvm_target when KVM is enabled
>   target/arm: Factor aarch64_aa32_a57_init() out
>   target/arm: Re-use common aarch64_aa32_a57_init() helper
>   target/arm: Define 'max' CPU type in cpu-max.c
>   target/arm: Build cpu32-system.o as common object
>   target/arm: Build cpu-max.c once
> 
>  include/hw/arm/armv7m.h                    |   2 +-
>  include/hw/misc/tz-msc.h                   |   2 +-
>  target/arm/internals.h                     |  10 +-
>  target/arm/{ => tcg}/idau.h                |   4 +-
>  hw/arm/armv7m.c                            |   2 +-
>  hw/arm/aspeed_ast27x0.c                    |   7 +-
>  hw/arm/bcm2836.c                           |  14 +-
>  hw/arm/raspi.c                             |   4 -
>  target/arm/cpu-max.c                       | 241 +++++++++++++++++++++
>  target/arm/cpu.c                           |  10 +-
>  target/arm/cpu32-stubs.c                   |   8 +-
>  target/arm/cpu64.c                         |  92 +-------
>  target/arm/ptw.c                           |   2 +-
>  target/arm/tcg/cpu-v7m.c                   |  11 +
>  target/arm/tcg/{cpu32.c => cpu32-system.c} | 191 +---------------
>  target/arm/tcg/stubs32.c                   |  10 +
>  hw/arm/meson.build                         |  15 +-
>  hw/intc/meson.build                        |   2 +-
>  target/arm/meson.build                     |  26 ++-
>  target/arm/tcg/meson.build                 |  60 ++---
>  20 files changed, 349 insertions(+), 364 deletions(-)
>  rename target/arm/{ => tcg}/idau.h (97%)
>  create mode 100644 target/arm/cpu-max.c
>  rename target/arm/tcg/{cpu32.c => cpu32-system.c} (80%)
> 

It seems there are some tests failing, and build failing also (on
kvm/arm with aarch64 host):
https://github.com/p-b-o/qemu-ci/actions/runs/25923481301

Regards,
Pierrick

Patchew 2.1-devel-ea86937

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