[v6] hw/riscv: Server Platform Reference Board

[PATCH v6 0/4] hw/riscv: Server Platform Reference Board

Daniel Henrique Barboza posted 4 patches 1 week, 3 days ago

Diff against v5
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260514204640.2540054-1-daniel.barboza@oss.qualcomm.com

Maintainers: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu.zevorn@gmail.com>, Paolo Bonzini <pbonzini@redhat.com>

configs/devices/riscv64-softmmu/default.mak |    1 +
docs/system/riscv/riscv-server-ref.rst      |   37 +
docs/system/target-riscv.rst                |    1 +
hw/riscv/Kconfig                            |   15 +
hw/riscv/meson.build                        |    1 +
hw/riscv/server_platform_ref.c              | 1371 +++++++++++++++++++
target/riscv/cpu-qom.h                      |    1 +
target/riscv/cpu.c                          |   12 +-
8 files changed, 1438 insertions(+), 1 deletion(-)
create mode 100644 docs/system/riscv/riscv-server-ref.rst
create mode 100644 hw/riscv/server_platform_ref.c

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[PATCH v6 0/4] hw/riscv: Server Platform Reference Board

Posted by Daniel Henrique Barboza 1 week, 3 days ago

Hello,

In this version minor changes were made in patch 2 and 4.  No other
changes were made.

Patches are based on alistair/riscv-to-apply.next @56bbd4f25c, plus
Chao Liu's series "[PATCH v6 0/7] riscv: add initial sdext support"
[1].  For convenience this series is available at this branch:

https://gitlab.com/danielhb/qemu/-/tree/riscv-server-ref_v6


Changes from v5:
- patch 2: changed CPU satp mode to sv48
- patch 6: added extra information about how the board will eventually
  support future spec revisions
- v5 link: https://lore.kernel.org/qemu-devel/20260424191129.1494381-1-daniel.barboza@oss.qualcomm.com/

Daniel Henrique Barboza (2):
  target/riscv/cpu.c: remove 'bare' condition for .profile
  docs: add riscv-server-ref.rst

Fei Wu (2):
  target/riscv: Add server platform reference cpu
  hw/riscv: server platform reference machine

 configs/devices/riscv64-softmmu/default.mak |    1 +
 docs/system/riscv/riscv-server-ref.rst      |   37 +
 docs/system/target-riscv.rst                |    1 +
 hw/riscv/Kconfig                            |   15 +
 hw/riscv/meson.build                        |    1 +
 hw/riscv/server_platform_ref.c              | 1371 +++++++++++++++++++
 target/riscv/cpu-qom.h                      |    1 +
 target/riscv/cpu.c                          |   12 +-
 8 files changed, 1438 insertions(+), 1 deletion(-)
 create mode 100644 docs/system/riscv/riscv-server-ref.rst
 create mode 100644 hw/riscv/server_platform_ref.c

-- 
2.43.0