target/arm: Fix Coverity issues in GICv5 code

[PATCH 0/4] target/arm: Fix Coverity issues in GICv5 code

Peter Maydell posted 4 patches 2 weeks, 4 days ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260512093856.3197700-1-peter.maydell@linaro.org

Maintainers: Peter Maydell <peter.maydell@linaro.org>

hw/intc/arm_gicv5.c               |  3 ++-
include/hw/intc/arm_gicv5_types.h |  2 ++
target/arm/tcg/gicv5-cpuif.c      | 26 ++++++++++++++------------
3 files changed, 18 insertions(+), 13 deletions(-)

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[PATCH 0/4] target/arm: Fix Coverity issues in GICv5 code

Posted by Peter Maydell 2 weeks, 4 days ago

Coverity found a handful of bugs in the newly-landed GICv5 code;
this patchset provides fixes for them.

thanks
-- PMM

Peter Maydell (4):
  target/arm: GICv5 cpuif: Fix overflow in left shift
  target/arm: GICv5 cpuif: Don't set HPPIV bit in GICv5PendingIrq::intid
  hw/intc/arm_gicv5: Avoid NULL dereference in trace line
  hw/intc/arm_gicv5: Add missing early return in gicv5_set_handling()

 hw/intc/arm_gicv5.c               |  3 ++-
 include/hw/intc/arm_gicv5_types.h |  2 ++
 target/arm/tcg/gicv5-cpuif.c      | 26 ++++++++++++++------------
 3 files changed, 18 insertions(+), 13 deletions(-)

-- 
2.43.0