Minor fixes and enhancements of RISC-V AIA devices

[PATCH 0/4] Minor fixes and enhancements of RISC-V AIA devices

Jim Shu posted 4 patches 1 month ago

Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260428160103.3551125-1-jim.shu@sifive.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu.zevorn@gmail.com>

hw/intc/riscv_aplic.c | 116 +++++++++++++++++++++++++++++-------------
hw/intc/riscv_imsic.c |  19 +++++++
hw/intc/trace-events  |   4 ++
3 files changed, 105 insertions(+), 34 deletions(-)

Expand all Fold all

[PATCH 0/4] Minor fixes and enhancements of RISC-V AIA devices

Posted by Jim Shu 1 month ago

Bugfix:
  - APLIC should also clear pending bit from rectified value when it is
    in the both level-trigger mode and direct delivery mode.

Enhancements:
  - Add reset API to APLIC and IMSIC device
  - Add trace events of APLIC read/write function

Jim Shu (4):
  hw/intc: riscv_aplic: Fix level trigger IRQ in direct delivery mode
  hw/intc: riscv_aplic: Add reset API to APLIC
  hw/intc: riscv_imsic: Add reset API to IMSIC
  hw/intc: riscv_aplic: add trace events of APLIC read/write function

 hw/intc/riscv_aplic.c | 116 +++++++++++++++++++++++++++++-------------
 hw/intc/riscv_imsic.c |  19 +++++++
 hw/intc/trace-events  |   4 ++
 3 files changed, 105 insertions(+), 34 deletions(-)

-- 
2.43.0

Re: [PATCH 0/4] Minor fixes and enhancements of RISC-V AIA devices

Posted by Alistair Francis 1 week, 4 days ago

On Wed, Apr 29, 2026 at 2:04 AM Jim Shu <jim.shu@sifive.com> wrote:
>
> Bugfix:
>   - APLIC should also clear pending bit from rectified value when it is
>     in the both level-trigger mode and direct delivery mode.
>
> Enhancements:
>   - Add reset API to APLIC and IMSIC device
>   - Add trace events of APLIC read/write function
>
> Jim Shu (4):
>   hw/intc: riscv_aplic: Fix level trigger IRQ in direct delivery mode
>   hw/intc: riscv_aplic: Add reset API to APLIC
>   hw/intc: riscv_imsic: Add reset API to IMSIC
>   hw/intc: riscv_aplic: add trace events of APLIC read/write function

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  hw/intc/riscv_aplic.c | 116 +++++++++++++++++++++++++++++-------------
>  hw/intc/riscv_imsic.c |  19 +++++++
>  hw/intc/trace-events  |   4 ++
>  3 files changed, 105 insertions(+), 34 deletions(-)
>
> --
> 2.43.0
>
>