[PATCH] intel_iommu: Re-expose VTD_ECAP_PT

Zhenzhong Duan posted 1 patch 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260415095832.9631-1-zhenzhong.duan@intel.com
Maintainers: "Michael S. Tsirkin" <mst@redhat.com>, Jason Wang <jasowang@redhat.com>, Yi Liu <yi.l.liu@intel.com>, "Clément Mathieu--Drif" <clement.mathieu--drif@bull.com>, Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
hw/i386/intel_iommu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
[PATCH] intel_iommu: Re-expose VTD_ECAP_PT
Posted by Zhenzhong Duan 2 weeks ago
Commit c7b2e22bd957 cleared VTD_ECAP_PT in ecap register and set PHMT bit
in cap register, makes vIOMMU passthrough unsupported, fix it.

Fixes: c7b2e22bd957 ("hw/i386/x86-iommu: Remove X86IOMMUState::pt_supported field")
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
---
 hw/i386/intel_iommu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index f395fa248c..6b8f75a8b6 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -4998,8 +4998,8 @@ static void vtd_cap_init(IntelIOMMUState *s)
 {
     X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
 
-    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |
-             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |
+    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV |
+             VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |
              VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);
     if (x86_iommu->dma_translation) {
             if (s->aw_bits >= VTD_HOST_AW_39BIT) {
@@ -5009,7 +5009,7 @@ static void vtd_cap_init(IntelIOMMUState *s)
                     s->cap |= VTD_CAP_SAGAW_48bit;
             }
     }
-    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;
+    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT;
 
     if (x86_iommu_ir_supported(x86_iommu)) {
         s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;
-- 
2.47.3
Re: [PATCH] intel_iommu: Re-expose VTD_ECAP_PT
Posted by Clément MATHIEU--DRIF 2 weeks ago
Hi Zhenzhong,

Have you seen this?

https://patchew.org/QEMU/CAFFE2avrHDKZd5m7j3E3x5=F=pzn-3c9vzGWP3+9-AVPwQng7w@mail.gmail.com/

On Wed, 2026-04-15 at 05:58 -0400, Zhenzhong Duan wrote:
> Commit c7b2e22bd957 cleared VTD_ECAP_PT in ecap register and set PHMT bit  
> in cap register, makes vIOMMU passthrough unsupported, fix it.
> 
> Fixes: c7b2e22bd957 ("hw/i386/x86-iommu: Remove X86IOMMUState::pt_supported field")  
> Signed-off-by: Zhenzhong Duan <[zhenzhong.duan@intel.com](mailto:zhenzhong.duan@intel.com)>  
> ---  
>  hw/i386/intel_iommu.c | 6 +++---  
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c  
> index f395fa248c..6b8f75a8b6 100644  
> --- a/hw/i386/intel_iommu.c  
> +++ b/hw/i386/intel_iommu.c  
> @@ -4998,8 +4998,8 @@ static void vtd_cap_init(IntelIOMMUState *s)  
>  {  
>      X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);  
>    
> -    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |  
> -             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |  
> +    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV |  
> +             VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |  
>               VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);  
>      if (x86_iommu->dma_translation) {  
>              if (s->aw_bits >= VTD_HOST_AW_39BIT) {  
> @@ -5009,7 +5009,7 @@ static void vtd_cap_init(IntelIOMMUState *s)  
>                      s->cap |= VTD_CAP_SAGAW_48bit;  
>              }  
>      }  
> -    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;  
> +    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT;  
>    
>      if (x86_iommu_ir_supported(x86_iommu)) {  
>          s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;
RE: [PATCH] intel_iommu: Re-expose VTD_ECAP_PT
Posted by Duan, Zhenzhong 1 week, 6 days ago
Oh, I have not, thanks for sharing.

>-----Original Message-----
>From: Clément MATHIEU--DRIF <clement.mathieu--drif@bull.com>
>Sent: Wednesday, April 15, 2026 9:04 PM
>To: Duan, Zhenzhong <zhenzhong.duan@intel.com>; qemu-devel@nongnu.org
>Cc: mst@redhat.com; jasowang@redhat.com; philmd@linaro.org; Liu, Yi L
><yi.l.liu@intel.com>
>Subject: Re: [PATCH] intel_iommu: Re-expose VTD_ECAP_PT
>
>Hi Zhenzhong,
>
>Have you seen this?
>
>https://patchew.org/QEMU/CAFFE2avrHDKZd5m7j3E3x5=F=pzn-3c9vzGWP3+9-
>AVPwQng7w@mail.gmail.com/
>
>On Wed, 2026-04-15 at 05:58 -0400, Zhenzhong Duan wrote:
>> Commit c7b2e22bd957 cleared VTD_ECAP_PT in ecap register and set PHMT bit
>> in cap register, makes vIOMMU passthrough unsupported, fix it.
>>
>> Fixes: c7b2e22bd957 ("hw/i386/x86-iommu: Remove
>X86IOMMUState::pt_supported field")
>> Signed-off-by: Zhenzhong Duan
><[zhenzhong.duan@intel.com](mailto:zhenzhong.duan@intel.com)>
>> ---
>>  hw/i386/intel_iommu.c | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>> index f395fa248c..6b8f75a8b6 100644
>> --- a/hw/i386/intel_iommu.c
>> +++ b/hw/i386/intel_iommu.c
>> @@ -4998,8 +4998,8 @@ static void vtd_cap_init(IntelIOMMUState *s)
>>  {
>>      X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
>>
>> -    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |
>> -             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN
>|
>> +    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV
>|
>> +             VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |
>>               VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);
>>      if (x86_iommu->dma_translation) {
>>              if (s->aw_bits >= VTD_HOST_AW_39BIT) {
>> @@ -5009,7 +5009,7 @@ static void vtd_cap_init(IntelIOMMUState *s)
>>                      s->cap |= VTD_CAP_SAGAW_48bit;
>>              }
>>      }
>> -    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;
>> +    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT;
>>
>>      if (x86_iommu_ir_supported(x86_iommu)) {
>>          s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;