i.MX6UL LCDIF device model and SoC wiring

[PATCH v3 0/2] i.MX6UL LCDIF device model and SoC wiring

Yucai Liu posted 2 patches 1 month, 2 weeks ago

Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260412110240.93116-1-yangyanglan718@gmail.com

Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, Jean-Christophe Dubois <jcd@tribudubois.net>

MAINTAINERS                       |   2 +
hw/arm/Kconfig                    |   1 +
hw/arm/fsl-imx6ul.c               |  12 +-
hw/display/Kconfig                |   4 +
hw/display/imx6ul_lcdif.c         | 453 ++++++++++++++++++++++++++++++
hw/display/meson.build            |   1 +
include/hw/arm/fsl-imx6ul.h       |   4 +-
include/hw/display/imx6ul_lcdif.h |  37 +++
8 files changed, 511 insertions(+), 3 deletions(-)
create mode 100644 hw/display/imx6ul_lcdif.c
create mode 100644 include/hw/display/imx6ul_lcdif.h

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[PATCH v3 0/2] i.MX6UL LCDIF device model and SoC wiring

Posted by Yucai Liu 1 month, 2 weeks ago

From: Yucai Liu <1486344514@qq.com>

This series adds a basic i.MX6UL LCDIF device model under hw/display
and wires it into the i.MX6UL SoC.

Changes in v3:
- merge the previous "build symbol" patch into the device patch
- drop the unrelated hw/arm/meson.build line-wrap-only change
- fix commit message formatting (use real newlines)
- use 16 KiB for the LCDIF MMIO region size in both device and SoC map
- rework register indexing/storage to match 0x10-spaced register layout
- apply SET/CLR/TOG semantics only to registers that have those aliases
- set CTRL1 reset value to 0x000f0000
- remove redundant 32bpp host-surface check
- move realize-time cleanup to unrealize

Yucai Liu (2):
  hw/display: Add i.MX6UL LCDIF device model
  hw/arm/fsl-imx6ul: Wire in the LCDIF device model

 MAINTAINERS                       |   2 +
 hw/arm/Kconfig                    |   1 +
 hw/arm/fsl-imx6ul.c               |  12 +-
 hw/display/Kconfig                |   4 +
 hw/display/imx6ul_lcdif.c         | 453 ++++++++++++++++++++++++++++++
 hw/display/meson.build            |   1 +
 include/hw/arm/fsl-imx6ul.h       |   4 +-
 include/hw/display/imx6ul_lcdif.h |  37 +++
 8 files changed, 511 insertions(+), 3 deletions(-)
 create mode 100644 hw/display/imx6ul_lcdif.c
 create mode 100644 include/hw/display/imx6ul_lcdif.h

-- 
2.53.0

Re: [PATCH v3 0/2] i.MX6UL LCDIF device model and SoC wiring

Posted by Peter Maydell 1 month ago

On Sun, 12 Apr 2026 at 12:02, Yucai Liu <yangyanglan718@gmail.com> wrote:
>
> From: Yucai Liu <1486344514@qq.com>
>
> This series adds a basic i.MX6UL LCDIF device model under hw/display
> and wires it into the i.MX6UL SoC.
>
> Changes in v3:
> - merge the previous "build symbol" patch into the device patch
> - drop the unrelated hw/arm/meson.build line-wrap-only change
> - fix commit message formatting (use real newlines)
> - use 16 KiB for the LCDIF MMIO region size in both device and SoC map
> - rework register indexing/storage to match 0x10-spaced register layout
> - apply SET/CLR/TOG semantics only to registers that have those aliases
> - set CTRL1 reset value to 0x000f0000
> - remove redundant 32bpp host-surface check
> - move realize-time cleanup to unrealize
>
> Yucai Liu (2):
>   hw/display: Add i.MX6UL LCDIF device model
>   hw/arm/fsl-imx6ul: Wire in the LCDIF device model



Applied to target-arm.next, thanks.

-- PMM