Based-on: 20260407222208.271838-1-pierrick.bouvier@linaro.org
("[PATCH v11 00/21] target/arm: single-binary")
Version 2 here should probably be RFC. This time around, all
instruction loading, and more decode, is done by translate.
A new CPUARMState field is added for passing data to EXCP_SWI
and EXCP_NWFPE.
r~
Richard Henderson (7):
linux-user/arm: Restrict regpairs_aligned
target/arm: Only define aarch64_untagged_addr for aarch64
target/arm: Segregate target-specific user-only fields
target/arm: Store SVC immediate for user-only
target/arm: Recognize linux faux BPKT
target/arm: Introduce EXCP_NWFPE
target/arm: Remove bswap_code
linux-user/user-internals.h | 2 +-
target/arm/cpu.h | 27 ++++---------
linux-user/arm/cpu_loop.c | 75 +++++--------------------------------
target/arm/cpu.c | 28 +++++++-------
target/arm/tcg/translate.c | 63 ++++++++++++++++++++++++++++++-
target/arm/tcg/a32.decode | 5 ++-
target/arm/tcg/t16.decode | 1 +
target/arm/tcg/t32.decode | 5 ++-
8 files changed, 103 insertions(+), 103 deletions(-)
--
2.43.0