From: Sid Manning <sidneym@quicinc.com>

Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Signed-off-by: Sid Manning <sidneym@quicinc.com>
---
 hw/hexagon/hexagon_dsp.c | 11 +++++++++++
 target/hexagon/cpu.c     |  1 -
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c
index d5df87605f4..649cafcf8ec 100644
--- a/hw/hexagon/hexagon_dsp.c
+++ b/hw/hexagon/hexagon_dsp.c
@@ -73,6 +73,7 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
                                 const struct hexagon_machine_config *m_cfg)
 {
     MemoryRegion *address_space;
+    MemoryRegion *config_table_rom;
     MemoryRegion *sram;
     DeviceState *glob_regs_dev;
 
@@ -86,6 +87,12 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
 
     address_space = get_system_memory();
 
+    config_table_rom = g_new(MemoryRegion, 1);
+    memory_region_init_rom(config_table_rom, NULL, "config_table.rom",
+                           sizeof(m_cfg->cfgtable), &error_fatal);
+    memory_region_add_subregion(address_space, m_cfg->cfgbase,
+                                config_table_rom);
+
     sram = g_new(MemoryRegion, 1);
     memory_region_init_ram(sram, NULL, "ddr.ram",
         machine->ram_size, &error_fatal);
@@ -114,6 +121,10 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
         }
 
     }
+
+    rom_add_blob_fixed_as("config_table.rom", &m_cfg->cfgtable,
+                          sizeof(m_cfg->cfgtable), m_cfg->cfgbase,
+                          &address_space_memory);
 }
 
 static void init_mc(MachineClass *mc)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index bd3eec0d525..9883c4d1681 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -404,7 +404,6 @@ void hexagon_cpu_soft_reset(CPUHexagonState *env)
 }
 #endif
 
-
 static void hexagon_cpu_reset_hold(Object *obj, ResetType type)
 {
     CPUState *cs = CPU(obj);
-- 
2.34.1