[PATCH 2/2] target/arm: Remove bswap_code

Richard Henderson posted 2 patches 3 days, 17 hours ago
Maintainers: Laurent Vivier <laurent@vivier.eu>, Pierrick Bouvier <pierrick.bouvier@linaro.org>, Peter Maydell <peter.maydell@linaro.org>
There is a newer version of this series
[PATCH 2/2] target/arm: Remove bswap_code
Posted by Richard Henderson 3 days, 17 hours ago
This function is no loner used.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.h | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 657ff4ab20..917e9919e8 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2568,22 +2568,6 @@ static inline int sme_vq(CPUARMState *env)
     return EX_TBFLAG_A64(env->hflags, SVL) + 1;
 }
 
-static inline bool bswap_code(bool sctlr_b)
-{
-#ifdef CONFIG_USER_ONLY
-    /* BE8 (SCTLR.B = 0, TARGET_BIG_ENDIAN = 1) is mixed endian.
-     * The invalid combination SCTLR.B=1/CPSR.E=1/TARGET_BIG_ENDIAN=0
-     * would also end up as a mixed-endian mode with BE code, LE data.
-     */
-    return TARGET_BIG_ENDIAN ^ sctlr_b;
-#else
-    /* All code access in ARM is little endian, and there are no loaders
-     * doing swaps that need to be reversed
-     */
-    return 0;
-#endif
-}
-
 enum {
     QEMU_PSCI_CONDUIT_DISABLED = 0,
     QEMU_PSCI_CONDUIT_SMC = 1,
-- 
2.43.0
Re: [PATCH 2/2] target/arm: Remove bswap_code
Posted by Philippe Mathieu-Daudé 2 days, 23 hours ago
On 8/4/26 03:33, Richard Henderson wrote:
> This function is no loner used.

\o/

(Typo "longer")

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/cpu.h | 16 ----------------
>   1 file changed, 16 deletions(-)

Re: [PATCH 2/2] target/arm: Remove bswap_code
Posted by Pierrick Bouvier 3 days ago
On 4/7/26 6:33 PM, Richard Henderson wrote:
> This function is no loner used.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/cpu.h | 16 ----------------
>   1 file changed, 16 deletions(-)
> 
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 657ff4ab20..917e9919e8 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -2568,22 +2568,6 @@ static inline int sme_vq(CPUARMState *env)
>       return EX_TBFLAG_A64(env->hflags, SVL) + 1;
>   }
>   
> -static inline bool bswap_code(bool sctlr_b)
> -{
> -#ifdef CONFIG_USER_ONLY
> -    /* BE8 (SCTLR.B = 0, TARGET_BIG_ENDIAN = 1) is mixed endian.
> -     * The invalid combination SCTLR.B=1/CPSR.E=1/TARGET_BIG_ENDIAN=0
> -     * would also end up as a mixed-endian mode with BE code, LE data.
> -     */
> -    return TARGET_BIG_ENDIAN ^ sctlr_b;
> -#else
> -    /* All code access in ARM is little endian, and there are no loaders
> -     * doing swaps that need to be reversed
> -     */
> -    return 0;
> -#endif
> -}
> -
>   enum {
>       QEMU_PSCI_CONDUIT_DISABLED = 0,
>       QEMU_PSCI_CONDUIT_SMC = 1,

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>