This patch set is based on Philippe's "[PATCH-for-11.1] target/riscv:
Forbid to use legacy native endianness API"

I address comments I got on v5. Thanks everyone!

Djordje Todorovic (7):
  target/riscv: Define MSTATUS_SBE and MSTATUS_MBE bit masks
  target/riscv: Add big-endian CPU property
  target/riscv: Set endianness MSTATUS bits at CPU reset
  target/riscv: Implement runtime data endianness via MSTATUS bits
  hw/riscv: Make boot code endianness-aware at runtime
  target/riscv: Fix page table walk endianness for big-endian harts
  target/riscv: Add test for RISC-V BE

 hw/riscv/boot.c                            | 82 ++++++++++++++++++----
 include/hw/riscv/boot.h                    |  2 +
 target/riscv/cpu.c                         | 11 +--
 target/riscv/cpu.h                         | 28 ++++++++
 target/riscv/cpu_bits.h                    |  2 +
 target/riscv/cpu_cfg_fields.h.inc          |  1 +
 target/riscv/cpu_helper.c                  | 28 ++++++--
 target/riscv/internals.h                   |  9 +--
 target/riscv/tcg/tcg-cpu.c                 |  7 +-
 target/riscv/translate.c                   | 13 ++--
 tests/functional/riscv64/meson.build       |  1 +
 tests/functional/riscv64/test_bigendian.py | 57 +++++++++++++++
 12 files changed, 201 insertions(+), 40 deletions(-)
 create mode 100644 tests/functional/riscv64/test_bigendian.py

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2.34.1