[PATCH v3 00/14] intel_iommu: Enable PASID support for passthrough device

Zhenzhong Duan posted 14 patches 1 week, 1 day ago
Failed in applying to current master (apply log)
hw/i386/intel_iommu_accel.h    |  20 +-
hw/i386/intel_iommu_internal.h |  44 +++-
include/hw/core/iommu.h        |   3 +
include/hw/i386/intel_iommu.h  |   4 +-
include/hw/vfio/vfio-device.h  |   1 +
include/system/iommufd.h       |  16 +-
backends/iommufd.c             |   9 +-
hw/arm/smmuv3-accel.c          |  12 +-
hw/i386/intel_iommu.c          |  94 +++-----
hw/i386/intel_iommu_accel.c    | 425 +++++++++++++++++++++++++++------
hw/vfio/device.c               |  11 +
hw/vfio/iommufd.c              |  56 +++--
hw/vfio/trace-events           |   4 +-
13 files changed, 528 insertions(+), 171 deletions(-)
[PATCH v3 00/14] intel_iommu: Enable PASID support for passthrough device
Posted by Zhenzhong Duan 1 week, 1 day ago
Hi,

Now we already support first stage translation with passthrough device
backed by nested translation in host, but only for IOMMU_NO_PASID.

Structure VTDAddressSpace includes some elements suitable for emulated
device and passthrough device without PASID, e.g., address space,
different memory regions, etc, it is also protected by vtd iommu lock,
all these are useless and become a burden for passthrough device with
PASID.

When there are lots of PASIDs used in one device, the AS and MRs are
all registered to memory core and impact the whole system performance.

So instead of using VTDAddressSpace to cache pasid entry for each pasid
of a passthrough device, we define a light weight structure
VTDAccelPASIDCacheEntry with only necessary elements for each pasid. We
will use this struct as a parameter to conduct binding/unbinding to
nested hwpt, to record the current binded nested hwpt and even future
PRQ support. It's also designed to support IOMMU_NO_PASID.

The potential full definition of VTDAccelPASIDCacheEntry may like:

  typedef struct VTDAccelPASIDCacheEntry {
      VTDHostIOMMUDevice *vtd_hiod;
      VTDPASIDEntry pasid_entry;
      uint32_t pasid;
      uint32_t fs_hwpt_id;
      uint32_t fault_id;
      int fault_fd;
      QLIST_HEAD(, VTDPRQEntry) vtd_prq_list;
      IOMMUPRINotifier pri_notifier_entry;
      IOMMUPRINotifier *pri_notifier;
      QLIST_ENTRY(VTDAccelPASIDCacheEntry) next;
  } VTDAccelPASIDCacheEntry;

Based on vfio-next.
GIT branch: https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_pasid.v3

PATCH01-07: Some preparing work
PATCH08-12: Handle PASID entry addition/removal and bind/unbind
PATCH13-14: Add PASID related check and enable PASID for passthrough device

This patchset depends on a kernel feature enhancement[1] to work.

Tests:
Tested with DSA device which driver uses 2 PASIDs by default.

Thanks
Zhenzhong

[1] https://lore.kernel.org/all/20260330101108.12594-1-zhenzhong.duan@intel.com/

Changelog:
v3:
- fix @Pasid parameter's comment (Liuyi)
- introduce a wrapper vtd_accel_delete_pc() (Liuyi)
- drop patch12 in v2 to avoid a race condition (Clement)
- s/PASID_0/IOMMU_NO_PASID s/gloal/global s/as_it/hiod_it (Liuyi)
- make trace_vtd_device_at/detach_hwpt use IOMMU_NO_PASID (Liuyi)
- change _accel subfix style naming to vtd_accel_ prefix style (Liuyi)
- drop unnecessary parameter vtd_hiod* from vtd_destroy_old_fs_hwpt() (Liuyi)
- introduce a new flag VIOMMU_FLAG_WANT_PASID_ATTACH for pasid attach (Nicolin)

v2:
- move the check "s->pasid > PCI_EXT_CAP_PASID_MAX_WIDTH" to patch5 (Clement)
- move #include "hw/core/iommu.h" before #include "hw/core/qdev.h" (Liuyi)
- polish the comment about @Pasid parameter (Liuyi)
- s/pe/pasid_entry, s/as_it/hiod_it, s/vtd_find_add_pc/vtd_accel_fill_pc (Liuyi)
- s/VTDACCELPASIDCacheEntry/VTDAccelPASIDCacheEntry (Liuyi)
- add explanation in code about PASID removal before addition (Liuyi)
- polish the comment about scope of VTDAccelPASIDCacheEntry vs VTDPASIDCacheEntry (Liuyi)
- add an optimization to bypass PASID entry addition for PASID selective pv_inv_dsc (Liuyi)

v1:
- use naming pattern "XXX_SET_THENAME" same as smmu (Clement)
- fix s->pasid check (Clement)

RFCv2:
- extend attach/detach_hwpt() instead of introducing new callbacks (Shammer)
- Define IOMMU_NO_PASID for device attachment without pasid (Nicolin)
- update vtd_destroy_old_fs_hwpt()'s parameter for naming consistency (Clement)
- check pasid bits size to be no more than 20 bits (Clement)
- initialize local variable max_pasid_log2 to 0 (Cédric)


Zhenzhong Duan (14):
  vfio/iommufd: Extend attach/detach_hwpt callback implementations with
    pasid
  iommufd: Extend attach/detach_hwpt callbacks to support pasid
  vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID
    flag
  intel_iommu: Create the nested hwpt with IOMMU_HWPT_ALLOC_PASID flag
  intel_iommu: Change pasid property from bool to uint8
  intel_iommu: Export some functions
  intel_iommu: Use IOMMU_NO_PASID and delete PASID_0
  intel_iommu_accel: Handle PASID entry addition for pc_inv_dsc request
  intel_iommu_accel: Handle PASID entry removal for pc_inv_dsc request
  intel_iommu_accel: Bypass PASID entry addition for just deleted entry
  intel_iommu_accel: Handle PASID entry removal for system reset
  intel_iommu_accel: Switch to VTDAccelPASIDCacheEntry for PASID
    bind/unbind and PIOTLB invalidation
  intel_iommu_accel: Add pasid bits size check
  intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED when configured

 hw/i386/intel_iommu_accel.h    |  20 +-
 hw/i386/intel_iommu_internal.h |  44 +++-
 include/hw/core/iommu.h        |   3 +
 include/hw/i386/intel_iommu.h  |   4 +-
 include/hw/vfio/vfio-device.h  |   1 +
 include/system/iommufd.h       |  16 +-
 backends/iommufd.c             |   9 +-
 hw/arm/smmuv3-accel.c          |  12 +-
 hw/i386/intel_iommu.c          |  94 +++-----
 hw/i386/intel_iommu_accel.c    | 425 +++++++++++++++++++++++++++------
 hw/vfio/device.c               |  11 +
 hw/vfio/iommufd.c              |  56 +++--
 hw/vfio/trace-events           |   4 +-
 13 files changed, 528 insertions(+), 171 deletions(-)


base-commit: 976837a32b9fefea630dbe3e7c53e7479e614130
-- 
2.47.3