From: Thomas Huth <thuth@redhat.com>

qemu-system-x86_64 is pretty much a proper superset of qemu-system-i386,
so in the long run, it does not make too much sense that we continuously
build two binaries here, we should deprecate the latter rather sooner
than later.
However, some people still might want to start QEMU in a mode that limits
the environment to 32-bit. Thus allow qemu-system-x86_64 to run in 32-bit
mode if the binary name ends in "-i386".

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 target/i386/cpu.h     | 15 +++------------
 target/i386/cpu.c     | 20 ++++++++++----------
 target/i386/gdbstub.c |  2 +-
 3 files changed, 14 insertions(+), 23 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 0b539155c40..9cb357aa797 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -36,13 +36,8 @@
 
 #define XEN_NR_VIRQS 24
 
-#ifdef TARGET_X86_64
-#define I386_ELF_MACHINE  EM_X86_64
-#define ELF_MACHINE_UNAME "x86_64"
-#else
-#define I386_ELF_MACHINE  EM_386
-#define ELF_MACHINE_UNAME "i686"
-#endif
+#define I386_ELF_MACHINE  (target_x86_64() ? EM_X86_64 : EM_386)
+#define ELF_MACHINE_UNAME (target_x86_64() ? "x86_64" : "i686")
 
 enum {
     R_EAX = 0,
@@ -277,11 +272,7 @@ typedef enum X86Seg {
 #define CR4_PKS_MASK   (1U << 24)
 #define CR4_LAM_SUP_MASK (1U << 28)
 
-#ifdef TARGET_X86_64
-#define CR4_FRED_MASK   (1ULL << 32)
-#else
-#define CR4_FRED_MASK   0
-#endif
+#define CR4_FRED_MASK   (target_x86_64() ? (1ULL << 32) : 0)
 
 #define CR4_RESERVED_MASK \
 (~(target_ulong)(CR4_VME_MASK | CR4_PVI_MASK | CR4_TSD_MASK \
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c6fd1dc00eb..e30d47831d6 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8094,18 +8094,18 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w)
     }
 
     switch (w) {
-#ifndef TARGET_X86_64
     case FEAT_8000_0001_EDX:
         /*
          * 32-bit TCG can emulate 64-bit compatibility mode.  If there is no
          * way for userspace to get out of its 32-bit jail, we can leave
          * the LM bit set.
          */
-        unavail = tcg_enabled()
-            ? CPUID_EXT2_LM & ~CPUID_EXT2_KERNEL_FEATURES
-            : CPUID_EXT2_LM;
+        if (target_i386()) {
+            unavail = tcg_enabled()
+                ? CPUID_EXT2_LM & ~CPUID_EXT2_KERNEL_FEATURES
+                : CPUID_EXT2_LM;
+        }
         break;
-#endif
 
     case FEAT_8000_0007_EBX:
         if (cpu && !IS_AMD_CPU(&cpu->env)) {
@@ -8351,11 +8351,11 @@ static void x86_cpu_load_model(X86CPU *cpu, const X86CPUModel *model)
 
 static const gchar *x86_gdb_arch_name(CPUState *cs)
 {
-#ifdef TARGET_X86_64
-    return "i386:x86-64";
-#else
-    return "i386";
-#endif
+    if (target_x86_64()) {
+        return "i386:x86-64";
+    } else {
+        return "i386";
+    }
 }
 
 static void x86_cpu_cpudef_class_init(ObjectClass *oc, const void *data)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index 5c5fa727216..951c443e6d2 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -498,7 +498,7 @@ void x86_cpu_gdb_init(CPUState *cs)
 #ifdef TARGET_X86_64
     CPUX86State *env = &X86_CPU(cs)->env;
 
-    if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_APXF) {
+    if (target_x86_64() && (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_APXF)) {
         gdb_register_coprocessor(cs, i386_cpu_gdb_get_egprs,
                                  i386_cpu_gdb_set_egprs,
                                  gdb_find_static_feature("i386-64bit-apx.xml"));
-- 
2.53.0