This is Part 1 of the hexagon system emulation (sysemu) patch series,
providing the foundational target infrastructure needed for full-system
emulation of the Qualcomm Hexagon DSP.

Changes since v5:
  - Rebased onto latest tip (7a2dc48276e, "Merge tag 'for-upstream'")
  - Moved #include "qemu/main-loop.h" from "Add sysemu TCG overrides"
    to "Add sreg_{read,write} helpers" where BQL is first used
  - Changed NUM_PGSIZE_TYPES from an enum sentinel to a #define
    (PGSIZE_1G + 1)
  - Removed DEFINE_PROP_LINK("tlb") from "Introduce hexagon TLB
    device" -- deferred to Part 3's "virt" machine commit where
    the property is first set
  - Fixed bare %x/%d format specifiers (PRIx32, PRIu32) across
    multiple files
  - Changed hexagon_tlb_dump_entry() and hexagon_tlb_dump() from
    FILE * to Monitor * interface, using monitor_printf() instead of
    fprintf() (Philippe review feedback)
  - Updated dump_mmu() to accept Monitor * parameter
  - Simplified hex_log_tlbw() to use qemu_log_mask() for TLB write
    debug logging
  - Removed stale Reviewed-by tags from patches 34, 35 due to the
    above interface changes

Previous versions:
  v5: https://lore.kernel.org/qemu-devel/20260311034923.1044737-1-brian.cain@oss.qualcomm.com/
  v4: https://lore.kernel.org/qemu-devel/20260309144822.877695-1-brian.cain@oss.qualcomm.com/
  v3: https://lore.kernel.org/qemu-devel/20260227203627.932864-1-brian.cain@oss.qualcomm.com/
  v2: https://lore.kernel.org/qemu-devel/20250902034715.1947718-1-brian.cain@oss.qualcomm.com/
  v1: https://lore.kernel.org/qemu-devel/20250301052628.1011210-1-brian.cain@oss.qualcomm.com/

Brian Cain (37):
  docs: Add hexagon sysemu docs
  docs/system: Add hexagon CPU emulation
  target/hexagon: Fix badva reference, delete CAUSE
  target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof
  target/hexagon: Handle system/guest registers in gen_analyze_funcs.py
    and hex_common.py
  target/hexagon: Suppress unused-variable warnings for sysemu source
    regs
  target/hexagon: Make gen_exception_end_tb non-static
  target/hexagon: Switch to tag_ignore(), generate via
    get_{user,sys}_tags()
  target/hexagon: Add privilege check, use tag_ignore()
  target/hexagon: Add a placeholder fp exception
  target/hexagon: Add guest, system reg number defs
  target/hexagon: Add guest, system reg number state
  target/hexagon: Add TCG values for sreg, greg
  target/hexagon: Add guest/sys reg writes to DisasContext
  target/hexagon: Add imported macro, attr defs for sysemu
  target/hexagon: Add new macro definitions for sysemu
  target/hexagon: Add handlers for guest/sysreg r/w
  target/hexagon: Add placeholder greg/sreg r/w helpers
  target/hexagon: Add vmstate representation
  target/hexagon: Make A_PRIV, "J2_trap*" insts need_env()
  target/hexagon: Define register fields for system regs
  target/hexagon: Implement do_raise_exception()
  target/hexagon: Add system reg insns
  target/hexagon: Add sysemu TCG overrides
  target/hexagon: Add implicit attributes to sysemu macros
  target/hexagon: Add TCG overrides for int handler insts
  target/hexagon: Add TCG overrides for thread ctl
  target/hexagon: Add TCG overrides for rte, nmi
  target/hexagon: Add sreg_{read,write} helpers
  target/hexagon: Add representation to count cycles
  target/hexagon: Add implementation of cycle counters
  target/hexagon: Add pcycle setting functionality
  target/hexagon: Add cpu modes, mmu indices, next_PC to state
  hw/hexagon: Introduce hexagon TLB device
  target/hexagon: Add stubs for modify_ssr/get_exe_mode
  target/hexagon: Define f{S,G}ET_FIELD macros
  target/hexagon: Add hex_interrupts support

 MAINTAINERS                             |   3 +
 docs/devel/hexagon-sys.rst              | 112 ++++++
 docs/devel/index-internals.rst          |   1 +
 docs/system/hexagon/cdsp.rst            |  12 +
 docs/system/hexagon/emulation.rst       |  15 +
 docs/system/target-hexagon.rst          | 103 +++++
 docs/system/targets.rst                 |   1 +
 include/hw/hexagon/hexagon_tlb.h        |  46 +++
 target/hexagon/cpu-param.h              |   4 +
 target/hexagon/cpu.h                    |  77 +++-
 target/hexagon/cpu_bits.h               |  75 +++-
 target/hexagon/cpu_helper.h             |  18 +
 target/hexagon/gen_tcg.h                |   9 +
 target/hexagon/gen_tcg_sys.h            | 102 +++++
 target/hexagon/helper.h                 |  22 ++
 target/hexagon/hex_interrupts.h         |  15 +
 target/hexagon/hex_mmu.h                |  26 ++
 target/hexagon/hex_regs.h               | 117 ++++++
 target/hexagon/internal.h               |  18 +
 target/hexagon/macros.h                 |  35 +-
 target/hexagon/sys_macros.h             | 240 ++++++++++++
 target/hexagon/translate.h              |  46 +++
 target/hexagon/attribs_def.h.inc        |  35 +-
 target/hexagon/reg_fields_def.h.inc     |  96 +++++
 hw/hexagon/hexagon_tlb.c                | 466 +++++++++++++++++++++++
 linux-user/hexagon/cpu_loop.c           |  16 +
 target/hexagon/arch.c                   |   5 +
 target/hexagon/cpu.c                    |  57 ++-
 target/hexagon/cpu_helper.c             | 399 ++++++++++++++++++++
 target/hexagon/genptr.c                 | 151 ++++++++
 target/hexagon/hex_interrupts.c         | 379 +++++++++++++++++++
 target/hexagon/hex_mmu.c                | 268 +++++++++++++
 target/hexagon/machine.c                |  32 ++
 target/hexagon/op_helper.c              | 146 ++++++-
 target/hexagon/translate.c              |  56 ++-
 target/hexagon/gen_analyze_funcs.py     |  14 +-
 target/hexagon/gen_helper_funcs.py      |  26 +-
 target/hexagon/gen_helper_protos.py     |  23 +-
 target/hexagon/gen_idef_parser_funcs.py |   2 +
 target/hexagon/gen_op_attribs.py        |   2 +-
 target/hexagon/gen_opcodes_def.py       |   5 +-
 target/hexagon/gen_tcg_funcs.py         |  35 +-
 target/hexagon/hex_common.py            | 181 ++++++++-
 target/hexagon/imported/encode_pp.def   | 128 ++++++-
 target/hexagon/imported/macros.def      | 482 +++++++++++++++++++++++-
 target/hexagon/imported/system.idef     | 244 +++++++++++-
 target/hexagon/meson.build              |  13 +-
 47 files changed, 4248 insertions(+), 110 deletions(-)
 create mode 100644 docs/devel/hexagon-sys.rst
 create mode 100644 docs/system/hexagon/cdsp.rst
 create mode 100644 docs/system/hexagon/emulation.rst
 create mode 100644 docs/system/target-hexagon.rst
 create mode 100644 include/hw/hexagon/hexagon_tlb.h
 create mode 100644 target/hexagon/cpu_helper.h
 create mode 100644 target/hexagon/gen_tcg_sys.h
 create mode 100644 target/hexagon/hex_interrupts.h
 create mode 100644 target/hexagon/hex_mmu.h
 create mode 100644 target/hexagon/sys_macros.h
 create mode 100644 hw/hexagon/hexagon_tlb.c
 create mode 100644 target/hexagon/cpu_helper.c
 create mode 100644 target/hexagon/hex_interrupts.c
 create mode 100644 target/hexagon/hex_mmu.c
 create mode 100644 target/hexagon/machine.c
 mode change 100755 => 100644 target/hexagon/imported/macros.def

-- 
2.34.1