Overview
========

PHB in Power8 supports 8 byte registers, and hence the ops structure
allows accessing of 8 bytes in 'pnv_phb3_reg_ops'

Both 'pnv_phb3_reg_read' & 'pnv_phb3_reg_write' pass the arguments as is
to 'pnv_phb3_config_{read,write}', if offset is PHB_CONFIG_DATA.

This when called with size as 8, causes following assert failure in
'pci_host_config_read_common' & 'pci_host_config_write_common':

    assert(len <= 4);

This patch series splits it into two patches:
1. Fix PnvPHB3 code so that it never calls pci_host_config_{read,write}_common
   with read/write size of >4, thus fixing the assert problem
2. Replace the assert with bounds checking

Patch #2 should not have any functional change, since the issue is
already fixed by patch #1

Testing
=======

1. Git repo with the patches: https://gitlab.com/adi-g15-ibm/qemu/tree/fix_assert_phb3

2. Gitlab pipeline: https://gitlab.com/adi-g15-ibm/qemu/-/pipelines/2410981612

> Note: One test is failing in the pipeline, but the log shows some cargo error,
> unrelated to the patch series

3. Testcase provided by Zexiang Zhang, this will fail without the patches:

  cat << "EOF" | ./qemu-system-ppc64 \
    -M powernv8 -accel tcg -cpu POWER8 \
    -display none \
    -serial none -monitor none \
    -qtest stdio -S \
    -d guest_errors -D /tmp/pci_len_pnv.log
  writeq 0x3fc009013c000 0x140
  writeq 0x3fc009013c010 0x8000000000000000
  writeq 0x3fc009013c000 0x130
  readq 0x3fc009013c010
  EOF

Aditya Gupta (2):
  ppc/pnv_phb3: Error out on invalid config access
  hw/pci: Replace assert with bounds check and return

 hw/pci-host/pnv_phb3.c | 10 ++++++++++
 hw/pci/pci_host.c      | 14 ++++++++++++--
 2 files changed, 22 insertions(+), 2 deletions(-)

-- 
2.53.0