[v2] aspeed: Improve error handling and fix DMA issues

[PATCH v2 0/3] aspeed: Improve error handling and fix DMA issues

Cédric Le Goater posted 3 patches 1 week, 4 days ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260323125545.577653-1-clg@redhat.com

Maintainers: "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>, Jason Wang <jasowang@redhat.com>, Alistair Francis <alistair@alistair23.me>

hw/i2c/aspeed_i2c.c |  1 -
hw/net/ftgmac100.c  | 10 +++++++--
hw/ssi/aspeed_smc.c | 49 ++++++++++++++++++++++++++-------------------
3 files changed, 36 insertions(+), 24 deletions(-)

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[PATCH v2 0/3] aspeed: Improve error handling and fix DMA issues

Posted by Cédric Le Goater 1 week, 4 days ago

Hello,

This series addresses several error handling issues in Aspeed device
models that could lead to guest-triggerable denial of service or
incorrect behavior.

The first two patches improve DMA error handling by properly
propagating memory transaction errors to the guest. The aspeed_smc
patch converts memory operations to use read/write_with_attrs to
return MEMTX_ERROR on invalid conditions, while the ftgmac100 patch
checks DMA operation return values.

The third patch fixes an incorrect assertion in the aspeed_i2c model
that could be triggered when firmware uses the RX_BUF_LEN_W1T bit to
program DMA length fields separately, which is valid per the Aspeed
datasheet.

Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3335
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3315

Thanks,

C. 

Changes in v2:

- v1 was taking into account patch : 
  https://lore.kernel.org/all/20260224065556.3847942-14-jamin_lin@aspeedtech.com
  Rebased on upstream 

Cédric Le Goater (3):
  hw/ssi/aspeed_smc: Convert mem ops to read/write_with_attrs for error
    handling
  ftgmac100: Improve DMA error handling
  hw/i2c/aspeed_i2c: Remove assert

 hw/i2c/aspeed_i2c.c |  1 -
 hw/net/ftgmac100.c  | 10 +++++++--
 hw/ssi/aspeed_smc.c | 49 ++++++++++++++++++++++++++-------------------
 3 files changed, 36 insertions(+), 24 deletions(-)

-- 
2.53.0

Re: [PATCH v2 0/3] aspeed: Improve error handling and fix DMA issues

Posted by Cédric Le Goater 1 week, 4 days ago

On 3/23/26 13:55, Cédric Le Goater wrote:
> Hello,
> 
> This series addresses several error handling issues in Aspeed device
> models that could lead to guest-triggerable denial of service or
> incorrect behavior.
> 
> The first two patches improve DMA error handling by properly
> propagating memory transaction errors to the guest. The aspeed_smc
> patch converts memory operations to use read/write_with_attrs to
> return MEMTX_ERROR on invalid conditions, while the ftgmac100 patch
> checks DMA operation return values.
> 
> The third patch fixes an incorrect assertion in the aspeed_i2c model
> that could be triggered when firmware uses the RX_BUF_LEN_W1T bit to
> program DMA length fields separately, which is valid per the Aspeed
> datasheet.
> 
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3335
> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3315
> 
> Thanks,
> 
> C.
> 
> Changes in v2:
> 
> - v1 was taking into account patch :
>    https://lore.kernel.org/all/20260224065556.3847942-14-jamin_lin@aspeedtech.com
>    Rebased on upstream
> 
> Cédric Le Goater (3):
>    hw/ssi/aspeed_smc: Convert mem ops to read/write_with_attrs for error
>      handling
>    ftgmac100: Improve DMA error handling
>    hw/i2c/aspeed_i2c: Remove assert
> 
>   hw/i2c/aspeed_i2c.c |  1 -
>   hw/net/ftgmac100.c  | 10 +++++++--
>   hw/ssi/aspeed_smc.c | 49 ++++++++++++++++++++++++++-------------------
>   3 files changed, 36 insertions(+), 24 deletions(-)
> 


Applied to aspeed-next.

Thanks,

C.