Hello,
This series addresses several error handling issues in Aspeed device
models that could lead to guest-triggerable denial of service or
incorrect behavior.
The first two patches improve DMA error handling by properly
propagating memory transaction errors to the guest. The aspeed_smc
patch converts memory operations to use read/write_with_attrs to
return MEMTX_ERROR on invalid conditions, while the ftgmac100 patch
checks DMA operation return values.
The third patch fixes an incorrect assertion in the aspeed_i2c model
that could be triggered when firmware uses the RX_BUF_LEN_W1T bit to
program DMA length fields separately, which is valid per the Aspeed
datasheet.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3335
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3315
Thanks,
C.
Cédric Le Goater (3):
hw/ssi/aspeed_smc: Convert mem ops to read/write_with_attrs for error
handling
ftgmac100: Improve DMA error handling
hw/i2c/aspeed_i2c: Remove assert
hw/i2c/aspeed_i2c.c | 1 -
hw/net/ftgmac100.c | 10 ++++++--
hw/ssi/aspeed_smc.c | 58 ++++++++++++++++++++++++++-------------------
3 files changed, 42 insertions(+), 27 deletions(-)
--
2.53.0