Add new attribute to the memory transaction attributes that is used
on Arm to select the address space where the encrypted page resides.

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
---
 include/exec/memattrs.h | 7 +++++++
 target/arm/cpu.h        | 6 +++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index 52ee955249..efe9d9c7ba 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -57,6 +57,13 @@ typedef struct MemTxAttrs {
     /* PCI - IOMMU operations, see PCIAddressType */
     unsigned int address_type:1;
 
+    /*
+    * Memory is encrypted. This is used to acccess the substitute
+    * encrypted page that has its own address space. This is required
+    * by FEAT_MEC on ARM.
+    */
+    unsigned int encrypted:1;
+
     /*
      * Bus masters which don't specify any attributes will get this
      * (via the MEMTXATTRS_UNSPECIFIED constant), so that we can
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 87c1787c9b..ebf4e4e01c 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2596,7 +2596,11 @@ enum {
 /* Return the address space index to use for a memory access */
 static inline int arm_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
 {
-    return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
+    if (attrs.encrypted) {
+        return ARMASIdx_MEC_PAGE;
+    } else {
+        return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
+    }
 }
 
 /* Return the AddressSpace to use for a memory access
-- 
2.34.1

On 3/19/26 12:23, Gustavo Romero wrote:
> Add new attribute to the memory transaction attributes that is used
> on Arm to select the address space where the encrypted page resides.
> 
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
>   include/exec/memattrs.h | 7 +++++++
>   target/arm/cpu.h        | 6 +++++-
>   2 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
> index 52ee955249..efe9d9c7ba 100644
> --- a/include/exec/memattrs.h
> +++ b/include/exec/memattrs.h
> @@ -57,6 +57,13 @@ typedef struct MemTxAttrs {
>       /* PCI - IOMMU operations, see PCIAddressType */
>       unsigned int address_type:1;
>   
> +    /*
> +    * Memory is encrypted. This is used to acccess the substitute
> +    * encrypted page that has its own address space. This is required
> +    * by FEAT_MEC on ARM.
> +    */
> +    unsigned int encrypted:1;
> +
>       /*
>        * Bus masters which don't specify any attributes will get this
>        * (via the MEMTXATTRS_UNSPECIFIED constant), so that we can
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 87c1787c9b..ebf4e4e01c 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -2596,7 +2596,11 @@ enum {
>   /* Return the address space index to use for a memory access */
>   static inline int arm_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
>   {
> -    return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
> +    if (attrs.encrypted) {
> +        return ARMASIdx_MEC_PAGE;
> +    } else {
> +        return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
> +    }

I wish there were another way besides modifying MemTXAttrs, but at present there is not. 
Longer term, it might be better to store the AddressSpace directly in CPUTLBEntryFull, 
allowing tlb_fill to set it directly, and then all of the asidx_from_attrs functions go 
away.  Anyway, that's future work.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~