From: Nathan Chen <nathanc@nvidia.com>
Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode.
The 'auto' value is not implemented, as this commit is meant to set the
property to the correct type and avoid breaking JSON/QMP when the auto
mode is introduced. A future patch will implement resolution of 'auto'
value to match the host SMMUv3 SSIDSIZE value.
Fixes: b8c6f8a69d27 ("hw/arm/smmuv3-accel: Make SubstreamID support configurable")
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Nathan Chen <nathanc@nvidia.com>
---
hw/arm/smmuv3-accel.c | 23 +++++++++++++++++++++--
hw/arm/smmuv3.c | 19 ++++++++++---------
include/hw/arm/smmuv3-common.h | 1 -
include/hw/arm/smmuv3.h | 3 ++-
4 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
index c31b64295e..bc6cbfebc2 100644
--- a/hw/arm/smmuv3-accel.c
+++ b/hw/arm/smmuv3-accel.c
@@ -802,7 +802,7 @@ static uint64_t smmuv3_accel_get_viommu_flags(void *opaque)
SMMUState *bs = opaque;
SMMUv3State *s = ARM_SMMUV3(bs);
- if (s->ssidsize) {
+ if (s->ssidsize > SSID_SIZE_MODE_0) {
flags |= VIOMMU_FLAG_PASID_SUPPORTED;
}
return flags;
@@ -817,6 +817,22 @@ static const PCIIOMMUOps smmuv3_accel_ops = {
.get_msi_direct_gpa = smmuv3_accel_get_msi_gpa,
};
+/*
+ * This returns the value of a SsidSizeMode value offset by 1 to
+ * account for the enum values offset by 1 from actual values.
+ *
+ * SSID_SIZE_MODE_0 = 1, SSID_SIZE_MODE_1 = 2, etc. so return 0
+ * if SSID_SIZE_MODE_0 is passed as input, return 1 if
+ * SSID_SIZE_MODE_1 is passed as input, etc.
+ */
+static uint8_t ssidsize_mode_to_value(SsidSizeMode mode)
+{
+ if (mode == SSID_SIZE_MODE_AUTO) {
+ return 0;
+ }
+ return mode - 1;
+}
+
void smmuv3_accel_idr_override(SMMUv3State *s)
{
if (!s->accel) {
@@ -842,7 +858,10 @@ void smmuv3_accel_idr_override(SMMUv3State *s)
* By default QEMU SMMUv3 has no SubstreamID support. Update IDR1 if user
* has enabled it.
*/
- s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE, s->ssidsize);
+ if (s->ssidsize > SSID_SIZE_MODE_0) {
+ s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE,
+ ssidsize_mode_to_value(s->ssidsize));
+ }
}
/* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index ea285bdf64..79018f8d66 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -20,6 +20,7 @@
#include "qemu/bitops.h"
#include "hw/core/irq.h"
#include "hw/core/sysbus.h"
+#include "hw/core/qdev-properties-system.h"
#include "migration/blocker.h"
#include "migration/vmstate.h"
#include "hw/core/qdev-properties.h"
@@ -625,7 +626,7 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
}
/* Multiple context descriptors require SubstreamID support */
- if (!s->ssidsize && STE_S1CDMAX(ste) != 0) {
+ if (s->ssidsize == SSID_SIZE_MODE_0 && STE_S1CDMAX(ste) != 0) {
qemu_log_mask(LOG_UNIMP,
"SMMUv3: multiple S1 context descriptors require SubstreamID support. "
"Configure ssidsize > 0 (requires accel=on)\n");
@@ -1979,6 +1980,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
error_setg(errp, "ril auto mode is not supported");
return false;
}
+ if (s->ssidsize == SSID_SIZE_MODE_AUTO) {
+ error_setg(errp, "ssidsize auto mode is not supported");
+ return false;
+ }
if (!s->accel) {
if (s->ril == ON_OFF_AUTO_OFF) {
@@ -1993,7 +1998,7 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
error_setg(errp, "OAS must be 44 bits when accel=off");
return false;
}
- if (s->ssidsize) {
+ if (s->ssidsize > SSID_SIZE_MODE_0) {
error_setg(errp, "ssidsize can only be set if accel=on");
return false;
}
@@ -2011,11 +2016,6 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
error_setg(errp, "OAS can only be set to 44 or 48 bits");
return false;
}
- if (s->ssidsize > SMMU_SSID_MAX_BITS) {
- error_setg(errp, "ssidsize must be in the range 0 to %d",
- SMMU_SSID_MAX_BITS);
- return false;
- }
return true;
}
@@ -2144,7 +2144,8 @@ static const Property smmuv3_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril, ON_OFF_AUTO_ON),
DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats, ON_OFF_AUTO_OFF),
DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44),
- DEFINE_PROP_UINT8("ssidsize", SMMUv3State, ssidsize, 0),
+ DEFINE_PROP_SSIDSIZE_MODE("ssidsize", SMMUv3State, ssidsize,
+ SSID_SIZE_MODE_0),
};
static void smmuv3_instance_init(Object *obj)
@@ -2185,7 +2186,7 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data)
"A value of N allows SSIDs in the range [0 .. 2^N - 1]. "
"Valid range is 0-20, where 0 disables SubstreamID support. "
"Defaults to 0. A value greater than 0 is required to enable "
- "PASID support.");
+ "PASID support. ssidsize=auto is not supported.");
}
static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu,
diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h
index 9f78bbe89e..7f0f992dfd 100644
--- a/include/hw/arm/smmuv3-common.h
+++ b/include/hw/arm/smmuv3-common.h
@@ -311,7 +311,6 @@ REG32(IDR1, 0x4)
FIELD(IDR1, TABLES_PRESET, 30, 1)
FIELD(IDR1, ECMDQ, 31, 1)
-#define SMMU_SSID_MAX_BITS 20
#define SMMU_IDR1_SIDSIZE 16
#define SMMU_CMDQS 19
#define SMMU_EVENTQS 19
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index c35e599bbc..ddf472493d 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -21,6 +21,7 @@
#include "hw/arm/smmu-common.h"
#include "qom/object.h"
+#include "qapi/qapi-types-misc-arm.h"
#define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-memory-region"
@@ -72,7 +73,7 @@ struct SMMUv3State {
OnOffAuto ril;
OnOffAuto ats;
uint8_t oas;
- uint8_t ssidsize;
+ SsidSizeMode ssidsize;
};
typedef enum {
--
2.43.0Subject line: please use the literal property name, for easier grepping.
I.e. something like
hw/arm/smmuv3-accel: Change "ssidsize" property to SsidSizeMode
Same for several other patches.
Nathan Chen <nathanc@nvidia.com> writes:
> From: Nathan Chen <nathanc@nvidia.com>
>
> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode.
Incompatible change; okay because property "ssidsize" is new in this
release. Spelling out such things out in the commit message helps
reviewers. Not worth a respin by itself.
Any particular reason this is called @ssidsize and not @ssid-size?
> The 'auto' value is not implemented, as this commit is meant to set the
> property to the correct type and avoid breaking JSON/QMP when the auto
> mode is introduced. A future patch will implement resolution of 'auto'
> value to match the host SMMUv3 SSIDSIZE value.
>
> Fixes: b8c6f8a69d27 ("hw/arm/smmuv3-accel: Make SubstreamID support configurable")
> Tested-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Nathan Chen <nathanc@nvidia.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
On 3/19/2026 5:14 AM, Markus Armbruster wrote: > Subject line: please use the literal property name, for easier grepping. > I.e. something like > > hw/arm/smmuv3-accel: Change "ssidsize" property to SsidSizeMode > > Same for several other patches. > Yes that would be easier for grepping - I will change it to use the literal property name in a respin today. > Nathan Chen<nathanc@nvidia.com> writes: > >> From: Nathan Chen<nathanc@nvidia.com> >> >> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode. > Incompatible change; okay because property "ssidsize" is new in this > release. Spelling out such things out in the commit message helps > reviewers. Not worth a respin by itself. > > Any particular reason this is called @ssidsize and not @ssid-size? I'm not sure there's a particular reason - this property was newly introduced in the accel SMMUv3 series [0]. Should we include a patch to change it to @ssid-size to match the format of other properties? [0] https://lore.kernel.org/all/20260126104342.253965-38-skolothumtho@nvidia.com/ Thanks, Nathan
On 3/23/26 6:28 PM, Nathan Chen wrote: > > > On 3/19/2026 5:14 AM, Markus Armbruster wrote: >> Subject line: please use the literal property name, for easier grepping. >> I.e. something like >> >> hw/arm/smmuv3-accel: Change "ssidsize" property to SsidSizeMode >> >> Same for several other patches. >> > Yes that would be easier for grepping - I will change it to use the > literal property name in a respin today. > >> Nathan Chen<nathanc@nvidia.com> writes: >> >>> From: Nathan Chen<nathanc@nvidia.com> >>> >>> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode. >> Incompatible change; okay because property "ssidsize" is new in this >> release. Spelling out such things out in the commit message helps >> reviewers. Not worth a respin by itself. >> >> Any particular reason this is called @ssidsize and not @ssid-size? > > I'm not sure there's a particular reason - this property was newly > introduced in the accel SMMUv3 series [0]. Should we include a patch > to change it to @ssid-size to match the format of other properties? > > [0] > https://lore.kernel.org/all/20260126104342.253965-38-skolothumtho@nvidia.com/ ssidsize is the terminology used in the SMMUv3 spec. So I would prefer we stick to it Thanks Eric > > Thanks, > Nathan >
> -----Original Message----- > From: Nathan Chen <nathanc@nvidia.com> > Sent: 23 March 2026 17:29 > To: Markus Armbruster <armbru@redhat.com> > Cc: qemu-devel@nongnu.org; qemu-arm@nongnu.org; Eric Auger > <eric.auger@redhat.com>; Peter Maydell <peter.maydell@linaro.org>; > Michael S . Tsirkin <mst@redhat.com>; Igor Mammedov > <imammedo@redhat.com>; Ani Sinha <anisinha@redhat.com>; Shannon > Zhao <shannon.zhaosl@gmail.com>; Paolo Bonzini <pbonzini@redhat.com>; > Daniel P.Berrangé <berrange@redhat.com>; Eric Blake > <eblake@redhat.com>; Shameer Kolothum Thodi > <skolothumtho@nvidia.com>; Matt Ochs <mochs@nvidia.com>; Nicolin Chen > <nicolinc@nvidia.com> > Subject: Re: [PATCH v4 5/8] hw/arm/smmuv3-accel: Change SSIDSIZE property > to SsidSizeMode > > > > On 3/19/2026 5:14 AM, Markus Armbruster wrote: > > Subject line: please use the literal property name, for easier grepping. > > I.e. something like > > > > hw/arm/smmuv3-accel: Change "ssidsize" property to SsidSizeMode > > > > Same for several other patches. > > > Yes that would be easier for grepping - I will change it to use the > literal property name in a respin today. > > > Nathan Chen<nathanc@nvidia.com> writes: > > > >> From: Nathan Chen<nathanc@nvidia.com> > >> > >> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode. > > Incompatible change; okay because property "ssidsize" is new in this > > release. Spelling out such things out in the commit message helps > > reviewers. Not worth a respin by itself. > > > > Any particular reason this is called @ssidsize and not @ssid-size? > > I'm not sure there's a particular reason - this property was newly > introduced in the accel SMMUv3 series [0]. Should we include a patch to > change it to @ssid-size to match the format of other properties? I don't think we should as that name was selected to match the SMMUv3 IDR1 register filed name in the SMMUv3 specification. Thanks, Shameer
Shameer Kolothum Thodi <skolothumtho@nvidia.com> writes:
>> On 3/19/2026 5:14 AM, Markus Armbruster wrote:
[...]
>> > Any particular reason this is called @ssidsize and not @ssid-size?
>>
>> I'm not sure there's a particular reason - this property was newly
>> introduced in the accel SMMUv3 series [0]. Should we include a patch to
>> change it to @ssid-size to match the format of other properties?
Separating words improves legibility. docs/devel/qapi-code-gen.rst
section "Naming rules and reserved names":
Command names, member names within a type, and feature names should
be all lower case with words separated by a hyphen.
However, we have a compelling reason for @ssidsize:
> I don't think we should as that name was selected to match the SMMUv3
> IDR1 register filed name in the SMMUv3 specification.
Thanks!
On 3/18/26 7:49 PM, Nathan Chen wrote:
> From: Nathan Chen <nathanc@nvidia.com>
>
> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode.
> The 'auto' value is not implemented, as this commit is meant to set the
> property to the correct type and avoid breaking JSON/QMP when the auto
> mode is introduced. A future patch will implement resolution of 'auto'
> value to match the host SMMUv3 SSIDSIZE value.
>
> Fixes: b8c6f8a69d27 ("hw/arm/smmuv3-accel: Make SubstreamID support configurable")
> Tested-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Nathan Chen <nathanc@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Eric
> ---
> hw/arm/smmuv3-accel.c | 23 +++++++++++++++++++++--
> hw/arm/smmuv3.c | 19 ++++++++++---------
> include/hw/arm/smmuv3-common.h | 1 -
> include/hw/arm/smmuv3.h | 3 ++-
> 4 files changed, 33 insertions(+), 13 deletions(-)
>
> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
> index c31b64295e..bc6cbfebc2 100644
> --- a/hw/arm/smmuv3-accel.c
> +++ b/hw/arm/smmuv3-accel.c
> @@ -802,7 +802,7 @@ static uint64_t smmuv3_accel_get_viommu_flags(void *opaque)
> SMMUState *bs = opaque;
> SMMUv3State *s = ARM_SMMUV3(bs);
>
> - if (s->ssidsize) {
> + if (s->ssidsize > SSID_SIZE_MODE_0) {
> flags |= VIOMMU_FLAG_PASID_SUPPORTED;
> }
> return flags;
> @@ -817,6 +817,22 @@ static const PCIIOMMUOps smmuv3_accel_ops = {
> .get_msi_direct_gpa = smmuv3_accel_get_msi_gpa,
> };
>
> +/*
> + * This returns the value of a SsidSizeMode value offset by 1 to
> + * account for the enum values offset by 1 from actual values.
> + *
> + * SSID_SIZE_MODE_0 = 1, SSID_SIZE_MODE_1 = 2, etc. so return 0
> + * if SSID_SIZE_MODE_0 is passed as input, return 1 if
> + * SSID_SIZE_MODE_1 is passed as input, etc.
> + */
> +static uint8_t ssidsize_mode_to_value(SsidSizeMode mode)
> +{
> + if (mode == SSID_SIZE_MODE_AUTO) {
> + return 0;
> + }
> + return mode - 1;
> +}
> +
> void smmuv3_accel_idr_override(SMMUv3State *s)
> {
> if (!s->accel) {
> @@ -842,7 +858,10 @@ void smmuv3_accel_idr_override(SMMUv3State *s)
> * By default QEMU SMMUv3 has no SubstreamID support. Update IDR1 if user
> * has enabled it.
> */
> - s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE, s->ssidsize);
> + if (s->ssidsize > SSID_SIZE_MODE_0) {
> + s->idr[1] = FIELD_DP32(s->idr[1], IDR1, SSIDSIZE,
> + ssidsize_mode_to_value(s->ssidsize));
> + }
> }
>
> /* Based on SMUUv3 GPBA.ABORT configuration, attach a corresponding HWPT */
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index ea285bdf64..79018f8d66 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -20,6 +20,7 @@
> #include "qemu/bitops.h"
> #include "hw/core/irq.h"
> #include "hw/core/sysbus.h"
> +#include "hw/core/qdev-properties-system.h"
> #include "migration/blocker.h"
> #include "migration/vmstate.h"
> #include "hw/core/qdev-properties.h"
> @@ -625,7 +626,7 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
> }
>
> /* Multiple context descriptors require SubstreamID support */
> - if (!s->ssidsize && STE_S1CDMAX(ste) != 0) {
> + if (s->ssidsize == SSID_SIZE_MODE_0 && STE_S1CDMAX(ste) != 0) {
> qemu_log_mask(LOG_UNIMP,
> "SMMUv3: multiple S1 context descriptors require SubstreamID support. "
> "Configure ssidsize > 0 (requires accel=on)\n");
> @@ -1979,6 +1980,10 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
> error_setg(errp, "ril auto mode is not supported");
> return false;
> }
> + if (s->ssidsize == SSID_SIZE_MODE_AUTO) {
> + error_setg(errp, "ssidsize auto mode is not supported");
> + return false;
> + }
>
> if (!s->accel) {
> if (s->ril == ON_OFF_AUTO_OFF) {
> @@ -1993,7 +1998,7 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
> error_setg(errp, "OAS must be 44 bits when accel=off");
> return false;
> }
> - if (s->ssidsize) {
> + if (s->ssidsize > SSID_SIZE_MODE_0) {
> error_setg(errp, "ssidsize can only be set if accel=on");
> return false;
> }
> @@ -2011,11 +2016,6 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
> error_setg(errp, "OAS can only be set to 44 or 48 bits");
> return false;
> }
> - if (s->ssidsize > SMMU_SSID_MAX_BITS) {
> - error_setg(errp, "ssidsize must be in the range 0 to %d",
> - SMMU_SSID_MAX_BITS);
> - return false;
> - }
>
> return true;
> }
> @@ -2144,7 +2144,8 @@ static const Property smmuv3_properties[] = {
> DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril, ON_OFF_AUTO_ON),
> DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats, ON_OFF_AUTO_OFF),
> DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44),
> - DEFINE_PROP_UINT8("ssidsize", SMMUv3State, ssidsize, 0),
> + DEFINE_PROP_SSIDSIZE_MODE("ssidsize", SMMUv3State, ssidsize,
> + SSID_SIZE_MODE_0),
> };
>
> static void smmuv3_instance_init(Object *obj)
> @@ -2185,7 +2186,7 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data)
> "A value of N allows SSIDs in the range [0 .. 2^N - 1]. "
> "Valid range is 0-20, where 0 disables SubstreamID support. "
> "Defaults to 0. A value greater than 0 is required to enable "
> - "PASID support.");
> + "PASID support. ssidsize=auto is not supported.");
> }
>
> static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu,
> diff --git a/include/hw/arm/smmuv3-common.h b/include/hw/arm/smmuv3-common.h
> index 9f78bbe89e..7f0f992dfd 100644
> --- a/include/hw/arm/smmuv3-common.h
> +++ b/include/hw/arm/smmuv3-common.h
> @@ -311,7 +311,6 @@ REG32(IDR1, 0x4)
> FIELD(IDR1, TABLES_PRESET, 30, 1)
> FIELD(IDR1, ECMDQ, 31, 1)
>
> -#define SMMU_SSID_MAX_BITS 20
> #define SMMU_IDR1_SIDSIZE 16
> #define SMMU_CMDQS 19
> #define SMMU_EVENTQS 19
> diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
> index c35e599bbc..ddf472493d 100644
> --- a/include/hw/arm/smmuv3.h
> +++ b/include/hw/arm/smmuv3.h
> @@ -21,6 +21,7 @@
>
> #include "hw/arm/smmu-common.h"
> #include "qom/object.h"
> +#include "qapi/qapi-types-misc-arm.h"
>
> #define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-memory-region"
>
> @@ -72,7 +73,7 @@ struct SMMUv3State {
> OnOffAuto ril;
> OnOffAuto ats;
> uint8_t oas;
> - uint8_t ssidsize;
> + SsidSizeMode ssidsize;
> };
>
> typedef enum {
> -----Original Message-----
> From: Nathan Chen <nathanc@nvidia.com>
> Sent: 18 March 2026 18:49
> To: qemu-devel@nongnu.org; qemu-arm@nongnu.org
> Cc: Eric Auger <eric.auger@redhat.com>; Peter Maydell
> <peter.maydell@linaro.org>; Michael S . Tsirkin <mst@redhat.com>; Igor
> Mammedov <imammedo@redhat.com>; Ani Sinha <anisinha@redhat.com>;
> Shannon Zhao <shannon.zhaosl@gmail.com>; Paolo Bonzini
> <pbonzini@redhat.com>; Daniel P . Berrangé <berrange@redhat.com>; Eric
> Blake <eblake@redhat.com>; Markus Armbruster <armbru@redhat.com>;
> Shameer Kolothum Thodi <skolothumtho@nvidia.com>; Matt Ochs
> <mochs@nvidia.com>; Nicolin Chen <nicolinc@nvidia.com>; Nathan Chen
> <nathanc@nvidia.com>
> Subject: [PATCH v4 5/8] hw/arm/smmuv3-accel: Change SSIDSIZE property to
> SsidSizeMode
>
> From: Nathan Chen <nathanc@nvidia.com>
>
> Change accel SMMUv3 SSIDSIZE property from uint8_t to SsidSizeMode.
> The 'auto' value is not implemented, as this commit is meant to set the
> property to the correct type and avoid breaking JSON/QMP when the auto
> mode is introduced. A future patch will implement resolution of 'auto'
> value to match the host SMMUv3 SSIDSIZE value.
>
> Fixes: b8c6f8a69d27 ("hw/arm/smmuv3-accel: Make SubstreamID support
> configurable")
> Tested-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Nathan Chen <nathanc@nvidia.com>
Reviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>
Thanks,
Shameer
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