target/riscv: Forbid to use legacy native endianness API

[PATCH-for-11.1 14/16] target/riscv: Replace MO_TE -> MO_LE

Posted by Philippe Mathieu-Daudé 2 weeks, 5 days ago

We only build the RISC-V target using little endianness order,
therefore the MO_TE definitions expand to the little endian
one. Use the latter which is more explicit.

Mechanical change running:

  $ sed -i -e s/MO_TE/MO_LE/ \
        $(git grep -wl MO_TE target/riscv/)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/riscv/internals.h | 2 +-
 target/riscv/translate.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/riscv/internals.h b/target/riscv/internals.h
index 860c47732b6..460346dd6de 100644
--- a/target/riscv/internals.h
+++ b/target/riscv/internals.h
@@ -71,7 +71,7 @@ static inline MemOp mo_endian_env(CPURISCVState *env)
      *  - MSTATUS_MBE (Machine-mode)
      * but we don't implement that yet.
      */
-    return MO_TE;
+    return MO_LE;
 }
 
 /* share data between vector helpers and decode code */
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index cb4f4436018..6f8b8e9d19a 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -135,7 +135,7 @@ static inline MemOp mo_endian(DisasContext *ctx)
      *  - MSTATUS_MBE (Machine-mode)
      * but we don't implement that yet.
      */
-    return MO_TE;
+    return MO_LE;
 }
 
 #ifdef TARGET_RISCV32
-- 
2.53.0

Re: [PATCH-for-11.1 14/16] target/riscv: Replace MO_TE -> MO_LE

Posted by Alistair Francis 1 week, 4 days ago

On Wed, Mar 18, 2026 at 8:34 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> We only build the RISC-V target using little endianness order,
> therefore the MO_TE definitions expand to the little endian
> one. Use the latter which is more explicit.
>
> Mechanical change running:
>
>   $ sed -i -e s/MO_TE/MO_LE/ \
>         $(git grep -wl MO_TE target/riscv/)
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/internals.h | 2 +-
>  target/riscv/translate.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/internals.h b/target/riscv/internals.h
> index 860c47732b6..460346dd6de 100644
> --- a/target/riscv/internals.h
> +++ b/target/riscv/internals.h
> @@ -71,7 +71,7 @@ static inline MemOp mo_endian_env(CPURISCVState *env)
>       *  - MSTATUS_MBE (Machine-mode)
>       * but we don't implement that yet.
>       */
> -    return MO_TE;
> +    return MO_LE;
>  }
>
>  /* share data between vector helpers and decode code */
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index cb4f4436018..6f8b8e9d19a 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -135,7 +135,7 @@ static inline MemOp mo_endian(DisasContext *ctx)
>       *  - MSTATUS_MBE (Machine-mode)
>       * but we don't implement that yet.
>       */
> -    return MO_TE;
> +    return MO_LE;
>  }
>
>  #ifdef TARGET_RISCV32
> --
> 2.53.0
>
>