Fix leaks reached by make check-qtest

[PATCH v1 4/4] hw/riscv: Free resources allocated at riscv_iommu_instance_init

Posted by Fabiano Rosas 3 weeks, 3 days ago

Add a riscv_iommu_instance_finalize() routine and move there the unref
of the iot_cache and ctx_cache hash tables from riscv_iommu_unrealize.

Also start freeing the register state masks, also allocated at the
_init function.

Signed-off-by: Fabiano Rosas <farosas@suse.de>
---
 hw/riscv/riscv-iommu.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index 98345b1280..a9cd891039 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -2446,6 +2446,18 @@ void riscv_iommu_set_cap_igs(RISCVIOMMUState *s, riscv_iommu_igs_mode mode)
     s->cap = set_field(s->cap, RISCV_IOMMU_CAP_IGS, mode);
 }
 
+static void riscv_iommu_instance_finalize(Object *obj)
+{
+    RISCVIOMMUState *s = RISCV_IOMMU(obj);
+
+    g_hash_table_unref(s->iot_cache);
+    g_hash_table_unref(s->ctx_cache);
+
+    g_free(s->regs_rw);
+    g_free(s->regs_ro);
+    g_free(s->regs_wc);
+}
+
 static void riscv_iommu_instance_init(Object *obj)
 {
     RISCVIOMMUState *s = RISCV_IOMMU(obj);
@@ -2597,9 +2609,6 @@ static void riscv_iommu_unrealize(DeviceState *dev)
 {
     RISCVIOMMUState *s = RISCV_IOMMU(dev);
 
-    g_hash_table_unref(s->iot_cache);
-    g_hash_table_unref(s->ctx_cache);
-
     if (s->cap & RISCV_IOMMU_CAP_HPM) {
         g_hash_table_unref(s->hpm_event_ctr_map);
         timer_free(s->hpm_timer);
@@ -2675,6 +2684,7 @@ static const TypeInfo riscv_iommu_info = {
     .parent = TYPE_DEVICE,
     .instance_size = sizeof(RISCVIOMMUState),
     .instance_init = riscv_iommu_instance_init,
+    .instance_finalize = riscv_iommu_instance_finalize,
     .class_init = riscv_iommu_class_init,
 };
 
-- 
2.51.0

Re: [PATCH v1 4/4] hw/riscv: Free resources allocated at riscv_iommu_instance_init

Posted by Peter Maydell 3 weeks ago

On Fri, 13 Mar 2026 at 18:30, Fabiano Rosas <farosas@suse.de> wrote:
>
> Add a riscv_iommu_instance_finalize() routine and move there the unref
> of the iot_cache and ctx_cache hash tables from riscv_iommu_unrealize.
>
> Also start freeing the register state masks, also allocated at the
> _init function.
>
> Signed-off-by: Fabiano Rosas <farosas@suse.de>

This is the same as
https://patchew.org/QEMU/20260307125222.3656140-1-peter.maydell@linaro.org/
which I sent last week.

thanks
-- PMM

Re: [PATCH v1 4/4] hw/riscv: Free resources allocated at riscv_iommu_instance_init

Posted by Fabiano Rosas 3 weeks ago

Peter Maydell <peter.maydell@linaro.org> writes:

> On Fri, 13 Mar 2026 at 18:30, Fabiano Rosas <farosas@suse.de> wrote:
>>
>> Add a riscv_iommu_instance_finalize() routine and move there the unref
>> of the iot_cache and ctx_cache hash tables from riscv_iommu_unrealize.
>>
>> Also start freeing the register state masks, also allocated at the
>> _init function.
>>
>> Signed-off-by: Fabiano Rosas <farosas@suse.de>
>
> This is the same as
> https://patchew.org/QEMU/20260307125222.3656140-1-peter.maydell@linaro.org/
> which I sent last week.
>

Ah ok, I missed it. Let's drop this one then.

> thanks
> -- PMM

Re: [PATCH v1 4/4] hw/riscv: Free resources allocated at riscv_iommu_instance_init

Posted by Philippe Mathieu-Daudé 3 weeks, 2 days ago

On 13/3/26 19:29, Fabiano Rosas wrote:
> Add a riscv_iommu_instance_finalize() routine and move there the unref
> of the iot_cache and ctx_cache hash tables from riscv_iommu_unrealize.
> 
> Also start freeing the register state masks, also allocated at the
> _init function.
> 
> Signed-off-by: Fabiano Rosas <farosas@suse.de>
> ---
>   hw/riscv/riscv-iommu.c | 16 +++++++++++++---
>   1 file changed, 13 insertions(+), 3 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Re: [PATCH v1 4/4] hw/riscv: Free resources allocated at riscv_iommu_instance_init

Posted by Daniel Henrique Barboza 3 weeks, 3 days ago


On 3/13/2026 3:29 PM, Fabiano Rosas wrote:
> Add a riscv_iommu_instance_finalize() routine and move there the unref
> of the iot_cache and ctx_cache hash tables from riscv_iommu_unrealize.
> 
> Also start freeing the register state masks, also allocated at the
> _init function.
> 
> Signed-off-by: Fabiano Rosas <farosas@suse.de>
> ---

Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>

>   hw/riscv/riscv-iommu.c | 16 +++++++++++++---
>   1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index 98345b1280..a9cd891039 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -2446,6 +2446,18 @@ void riscv_iommu_set_cap_igs(RISCVIOMMUState *s, riscv_iommu_igs_mode mode)
>       s->cap = set_field(s->cap, RISCV_IOMMU_CAP_IGS, mode);
>   }
>   
> +static void riscv_iommu_instance_finalize(Object *obj)
> +{
> +    RISCVIOMMUState *s = RISCV_IOMMU(obj);
> +
> +    g_hash_table_unref(s->iot_cache);
> +    g_hash_table_unref(s->ctx_cache);
> +
> +    g_free(s->regs_rw);
> +    g_free(s->regs_ro);
> +    g_free(s->regs_wc);
> +}
> +
>   static void riscv_iommu_instance_init(Object *obj)
>   {
>       RISCVIOMMUState *s = RISCV_IOMMU(obj);
> @@ -2597,9 +2609,6 @@ static void riscv_iommu_unrealize(DeviceState *dev)
>   {
>       RISCVIOMMUState *s = RISCV_IOMMU(dev);
>   
> -    g_hash_table_unref(s->iot_cache);
> -    g_hash_table_unref(s->ctx_cache);
> -
>       if (s->cap & RISCV_IOMMU_CAP_HPM) {
>           g_hash_table_unref(s->hpm_event_ctr_map);
>           timer_free(s->hpm_timer);
> @@ -2675,6 +2684,7 @@ static const TypeInfo riscv_iommu_info = {
>       .parent = TYPE_DEVICE,
>       .instance_size = sizeof(RISCVIOMMUState),
>       .instance_init = riscv_iommu_instance_init,
> +    .instance_finalize = riscv_iommu_instance_finalize,
>       .class_init = riscv_iommu_class_init,
>   };
>