On 11/3/26 04:49, Brian Cain wrote:
> From: Brian Cain <bcain@quicinc.com>
>
> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
> target/hexagon/internal.h | 4 ++++
> target/hexagon/cpu.c | 3 +++
> target/hexagon/machine.c | 32 ++++++++++++++++++++++++++++++++
> 3 files changed, 39 insertions(+)
> create mode 100644 target/hexagon/machine.c
>
> diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h
> index 5fc837ae229..cd06ff41d4f 100644
> --- a/target/hexagon/internal.h
> +++ b/target/hexagon/internal.h
> @@ -31,4 +31,8 @@ void hexagon_debug(CPUHexagonState *env);
>
> extern const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS];
>
> +#ifndef CONFIG_USER_ONLY
> +extern const VMStateDescription vmstate_hexagon_cpu;
> +#endif
> +
> #endif
> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
> index 6fabfaad6d2..38d605b06ba 100644
> --- a/target/hexagon/cpu.c
> +++ b/target/hexagon/cpu.c
> @@ -387,6 +387,9 @@ static void hexagon_cpu_class_init(ObjectClass *c, const void *data)
> cc->gdb_stop_before_watchpoint = true;
> cc->gdb_core_xml_file = "hexagon-core.xml";
> cc->disas_set_info = hexagon_cpu_disas_set_info;
> +#ifndef CONFIG_USER_ONLY
> + dc->vmsd = &vmstate_hexagon_cpu;
> +#endif
> cc->tcg_ops = &hexagon_tcg_ops;
> }
>
> diff --git a/target/hexagon/machine.c b/target/hexagon/machine.c
> new file mode 100644
> index 00000000000..d6dcd07dd4a
> --- /dev/null
> +++ b/target/hexagon/machine.c
> @@ -0,0 +1,32 @@
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "migration/cpu.h"
We don't need to include the target-specific "migration/cpu.h" header,
the target-agnostic "migration/vmstate.h" should be sufficient. With
that change:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> +#include "cpu.h"
> +
> +const VMStateDescription vmstate_hexagon_cpu = {
> + .name = "cpu",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .fields = (VMStateField[]) {
> + VMSTATE_UINT32_ARRAY(env.gpr, HexagonCPU, TOTAL_PER_THREAD_REGS),
> + VMSTATE_UINT32_ARRAY(env.pred, HexagonCPU, NUM_PREGS),
> + VMSTATE_UINT32_ARRAY(env.t_sreg, HexagonCPU, NUM_SREGS),
> + VMSTATE_UINT32_ARRAY(env.greg, HexagonCPU, NUM_GREGS),
> + VMSTATE_UINT32(env.next_PC, HexagonCPU),
> + VMSTATE_UINT32(env.tlb_lock_state, HexagonCPU),
> + VMSTATE_UINT32(env.k0_lock_state, HexagonCPU),
> + VMSTATE_UINT32(env.tlb_lock_count, HexagonCPU),
> + VMSTATE_UINT32(env.k0_lock_count, HexagonCPU),
> + VMSTATE_UINT32(env.threadId, HexagonCPU),
> + VMSTATE_UINT32(env.cause_code, HexagonCPU),
> + VMSTATE_UINT32(env.wait_next_pc, HexagonCPU),
> + VMSTATE_UINT64(env.t_cycle_count, HexagonCPU),
> +
> + VMSTATE_END_OF_LIST()
> + },
> +};