[v4] Add OCP FP8/FP4 and RISC-V Zvfofp8min/Zvfofp4min extension support

[PATCH v4 01/14] target/riscv: rvv: Fix NOP_UU_B vs2 width

Posted by Max Chou 1 month, 1 week ago

Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Signed-off-by: Max Chou <max.chou@sifive.com>
---
 target/riscv/vector_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index f75177b0fc..b2315ecf9c 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -4982,7 +4982,7 @@ GEN_VEXT_V_ENV(vfwcvtbf16_f_f_v, 4)
 
 /* Narrowing Floating-Point/Integer Type-Convert Instructions */
 /* (TD, T2, TX2) */
-#define NOP_UU_B uint8_t,  uint16_t, uint32_t
+#define NOP_UU_B uint8_t,  uint16_t, uint16_t
 #define NOP_UU_H uint16_t, uint32_t, uint32_t
 #define NOP_UU_W uint32_t, uint64_t, uint64_t
 /* vfncvt.xu.f.v vd, vs2, vm # Convert float to unsigned integer. */
-- 
2.52.0

Re: [PATCH v4 01/14] target/riscv: rvv: Fix NOP_UU_B vs2 width

Posted by Alistair Francis 1 month, 1 week ago

On Wed, Mar 4, 2026 at 11:42 PM Max Chou <max.chou@sifive.com> wrote:
>
> Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
> Signed-off-by: Max Chou <max.chou@sifive.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/vector_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index f75177b0fc..b2315ecf9c 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -4982,7 +4982,7 @@ GEN_VEXT_V_ENV(vfwcvtbf16_f_f_v, 4)
>
>  /* Narrowing Floating-Point/Integer Type-Convert Instructions */
>  /* (TD, T2, TX2) */
> -#define NOP_UU_B uint8_t,  uint16_t, uint32_t
> +#define NOP_UU_B uint8_t,  uint16_t, uint16_t
>  #define NOP_UU_H uint16_t, uint32_t, uint32_t
>  #define NOP_UU_W uint32_t, uint64_t, uint64_t
>  /* vfncvt.xu.f.v vd, vs2, vm # Convert float to unsigned integer. */
> --
> 2.52.0
>
>