[PATCH v3 13/37] target/hexagon: Add guest, system reg number state

Brian Cain posted 37 patches 2 days, 12 hours ago
Maintainers: Brian Cain <brian.cain@oss.qualcomm.com>, Pierrick Bouvier <pierrick.bouvier@linaro.org>, Laurent Vivier <laurent@vivier.eu>, Alessandro Di Federico <ale@rev.ng>, Anton Johansson <anjo@rev.ng>
[PATCH v3 13/37] target/hexagon: Add guest, system reg number state
Posted by Brian Cain 2 days, 12 hours ago
From: Brian Cain <bcain@quicinc.com>

Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 target/hexagon/cpu.h | 7 +++++++
 target/hexagon/cpu.c | 4 ++++
 2 files changed, 11 insertions(+)

diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 3619eaa1a52..057a5f20a67 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -97,6 +97,13 @@ typedef struct CPUArchState {
     target_ulong stack_start;
 
     uint8_t slot_cancelled;
+
+#ifndef CONFIG_USER_ONLY
+    /* Some system registers are per thread and some are global. */
+    target_ulong t_sreg[NUM_SREGS];
+
+    target_ulong greg[NUM_GREGS];
+#endif
     target_ulong new_value_usr;
 
     MemLog mem_log_stores[STORES_MAX];
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index a38568a2857..c4df7cbe30b 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -306,6 +306,10 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type)
     set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
     /* Default NaN value: sign bit set, all frac bits set */
     set_float_default_nan_pattern(0b11111111, &env->fp_status);
+#ifndef CONFIG_USER_ONLY
+    memset(env->t_sreg, 0, sizeof(target_ulong) * NUM_SREGS);
+    memset(env->greg, 0, sizeof(target_ulong) * NUM_GREGS);
+#endif
     env->cause_code = HEX_EVENT_NONE;
 }
 
-- 
2.34.1

Re: [PATCH v3 13/37] target/hexagon: Add guest, system reg number state
Posted by Philippe Mathieu-Daudé 2 days, 10 hours ago
On 27/2/26 21:36, Brian Cain wrote:
> From: Brian Cain <bcain@quicinc.com>
> 
> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
>   target/hexagon/cpu.h | 7 +++++++
>   target/hexagon/cpu.c | 4 ++++
>   2 files changed, 11 insertions(+)
> 
> diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
> index 3619eaa1a52..057a5f20a67 100644
> --- a/target/hexagon/cpu.h
> +++ b/target/hexagon/cpu.h
> @@ -97,6 +97,13 @@ typedef struct CPUArchState {
>       target_ulong stack_start;
>   
>       uint8_t slot_cancelled;
> +
> +#ifndef CONFIG_USER_ONLY
> +    /* Some system registers are per thread and some are global. */
> +    target_ulong t_sreg[NUM_SREGS];
> +
> +    target_ulong greg[NUM_GREGS];

Please do not add more target_ulong uses. Hexagon register size
is 32-bit, so use uint32_t for unsigned register type.