在 2026/2/25 上午9:41, Bibo Mao 写道:
> The features shown in cpucfg3 mostly are relative with cache capability,
> QEMU does not support cache emulation and discard these features.
> However it will be better if it is the same with host machine.
>
> Here add default cpucfg3 feature information with LA464 CPU.
>
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> ---
> target/loongarch/cpu.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
Reviewed-by: Song Gao <gaosong@loongson.cn>
Thanks.
Song Gao
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index f04558027d..93980e62a3 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -321,6 +321,22 @@ static void loongarch_la464_initfn(Object *obj)
> data = FIELD_DP32(data, CPUCFG2, LAM, 1);
> env->cpucfg[2] = data;
>
> + data = 0;
> + data = FIELD_DP32(data, CPUCFG3, CCDMA, 1);
> + data = FIELD_DP32(data, CPUCFG3, UCACC, 1);
> + data = FIELD_DP32(data, CPUCFG3, LLEXC, 1);
> + data = FIELD_DP32(data, CPUCFG3, SCDLY, 1);
> + data = FIELD_DP32(data, CPUCFG3, LLDBAR, 1);
> + data = FIELD_DP32(data, CPUCFG3, ITLBHMC, 1);
> + data = FIELD_DP32(data, CPUCFG3, ICHMC, 1);
> + data = FIELD_DP32(data, CPUCFG3, SPW_LVL, 4);
> + data = FIELD_DP32(data, CPUCFG3, SPW_HP_HF, 1);
> + if (kvm_enabled()) {
> + data = FIELD_DP32(data, CPUCFG3, RVA, 1);
> + data = FIELD_DP32(data, CPUCFG3, RVAMAX, 7);
> + }
> + env->cpucfg[3] = data;
> +
> env->cpucfg[4] = 100 * 1000 * 1000; /* Crystal frequency */
>
> data = 0;