On Mon, Feb 9, 2026 at 11:14 PM Cédric Le Goater <clg@kaod.org> wrote:
>
> On 2/10/26 06:10, Jamin Lin wrote:
> > AST2700 A2 is functionally identical to AST2700 A1.
> > There are no changes to the IRQ layout, memory map, or peripheral
> > configuration. The only difference is the silicon revision.
> >
> > This commit introduces a dedicated AST2700 A2 SoC type by reusing
> > the existing AST2700 A1 implementation and setting the A2 silicon
> > revision accordingly.
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> > hw/arm/aspeed_ast27x0.c | 36 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> > index 61790ea1cc..87dcb82e1b 100644
> > --- a/hw/arm/aspeed_ast27x0.c
> > +++ b/hw/arm/aspeed_ast27x0.c
> > @@ -1166,6 +1166,36 @@ static void aspeed_soc_ast2700a1_class_init(ObjectClass *oc, const void *data)
> > sc->memmap = aspeed_soc_ast2700_memmap;
> > }
> >
> > +static void aspeed_soc_ast2700a2_class_init(ObjectClass *oc, const void *data)
> > +{
> > + static const char * const valid_cpu_types[] = {
> > + ARM_CPU_TYPE_NAME("cortex-a35"),
> > + NULL
> > + };
> > + DeviceClass *dc = DEVICE_CLASS(oc);
> > + AspeedSoCClass *sc = ASPEED_SOC_CLASS(oc);
> > +
> > + /* Reason: The Aspeed SoC can only be instantiated from a board */
> > + dc->user_creatable = false;
> > + dc->realize = aspeed_soc_ast2700_realize;
> > +
> > + sc->valid_cpu_types = valid_cpu_types;
> > + sc->silicon_rev = AST2700_A2_SILICON_REV;
> > + sc->sram_size = 0x20000;
> > + sc->pcie_num = 3;
> > + sc->spis_num = 3;
> > + sc->sgpio_num = 2;
> > + sc->ehcis_num = 4;
> > + sc->wdts_num = 8;
> > + sc->macs_num = 3;
> > + sc->uarts_num = 13;
> > + sc->num_cpus = 4;
> > + sc->ioexp_num = 2;
> > + sc->uarts_base = ASPEED_DEV_UART0;
> > + sc->irqmap = aspeed_soc_ast2700a1_irqmap;
> > + sc->memmap = aspeed_soc_ast2700_memmap;
> > +}
> > +
> > static const TypeInfo aspeed_soc_ast27x0_types[] = {
> > {
> > .name = TYPE_ASPEED27X0_SOC,
> > @@ -1179,6 +1209,12 @@ static const TypeInfo aspeed_soc_ast27x0_types[] = {
> > .instance_init = aspeed_soc_ast2700_init,
> > .class_init = aspeed_soc_ast2700a1_class_init,
> > },
> > + {
> > + .name = "ast2700-a2",
> > + .parent = TYPE_ASPEED27X0_SOC,
> > + .instance_init = aspeed_soc_ast2700_init,
> > + .class_init = aspeed_soc_ast2700a2_class_init,
> > + },
> > };
> >
> > DEFINE_TYPES(aspeed_soc_ast27x0_types)
>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>
>
> Thanks,
>
> C.
>
>
Technically applies to the whole patchset, but specifically pointing
our internal machines to use this SoC so sending it to the relevant
patch.
Machines boot and work as intended once the SoC is updated, thank you Jamin!
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Thanks,
Nabih