[v3] i3c: aspeed: Add I3C support

[PATCH v3 00/20] i3c: aspeed: Add I3C support

Posted by Jamin Lin 1 day, 1 hour ago

v1:
  The initial patch series was based on work by Joe Komlodi <komlodi@google.com>.

  This series adds I3C bus support to QEMU and adds more functionality to the
  Aspeed I3C controller.

  This implementation is a basic implementation that introduces IBIs
  (including hot-join), CCCs, and SDR data transfer. As-is, it doesn't support
  multi-controller buses or HDR transfers.

  First we add the I3C bus and controller model. With that added we extend
  the functionality of the Aspeed I3C controller so it can do transfers
  and handle IBIs.

  Next, we add a mock I3C target. It's intended to be a very simple target
  just to verify that I3C is working on the guest. Internally, we've used it
  on Linux to verify that i3C devices can be probed and can send/receive data
  and IBIs.
  This target is sort of like an EEPROM, and it can also send IBIs upon
  reception of a user-defined magic number.

  Lastly we add  hotplugging support. The hotplugging doesn't do anything too
  complicated, it just adds the device attempting to hotplug to the bus. It
  is the device's responsibility to hot-join and go through the DAA process
  to participate on the bus.

v2:
  Jamin Lin <jamin_lin@aspeedtech.com> has taken ownership of the I3C patch
  series for upstream submission.

  Changes in this version include:

  1. Added I3C functional tests.
  2. Updated patch 4 to refine register field definitions.
  3. Updated patch 7 to correct read-only register field masks.

v3:
  1. Add Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
  2. Fix a typo
  3. Fix ASPEED mail server issue

Jamin Lin (1):
  tests/functional/arm/test_aspeed_ast2600_sdk: Add i3c functional test

Joe Komlodi (19):
  hw/misc/aspeed_i3c: Move to i3c directory
  hw/i3c: Add bus support
  hw/i3c: Split DesignWare I3C out of Aspeed I3C
  hw/i3c/dw-i3c: Add more register fields
  hw/i3c/aspeed_i3c: Add more register fields
  hw/i3c/dw-i3c: Add more reset values
  hw/i3c/aspeed_i3c: Add register RO field masks
  hw/i3c/dw-i3c: Add register RO field masks
  hw/i3c/dw-i3c: Treat more registers as read-as-zero
  hw/i3c/dw-i3c: Use 32 bits on MMIO writes
  hw/i3c/dw-i3c: Add IRQ MMIO behavior
  hw/i3c/dw-i3c: Add data TX and RX
  hw/i3c/dw-i3c: Add IBI handling
  hw/i3c/dw-i3c: Add ctrl MMIO handling
  hw/i3c/dw-i3c: Add controller resets
  hw/i3c/aspeed: Add I3C bus get function
  hw/i3c: Add Mock target
  hw/arm/aspeed: Build with I3C_DEVICES
  hw/i3c: Add hotplug support

 meson.build                                   |    1 +
 hw/i3c/trace.h                                |    2 +
 include/hw/arm/aspeed_soc.h                   |    2 +-
 include/hw/{misc => i3c}/aspeed_i3c.h         |   22 +-
 include/hw/i3c/dw-i3c.h                       |  201 ++
 include/hw/i3c/i3c.h                          |  277 +++
 include/hw/i3c/mock-i3c-target.h              |   52 +
 hw/i3c/aspeed_i3c.c                           |  261 +++
 hw/i3c/core.c                                 |  669 ++++++
 hw/i3c/dw-i3c.c                               | 1864 +++++++++++++++++
 hw/i3c/mock-i3c-target.c                      |  311 +++
 hw/misc/aspeed_i3c.c                          |  383 ----
 hw/Kconfig                                    |    1 +
 hw/arm/Kconfig                                |    3 +
 hw/i3c/Kconfig                                |   15 +
 hw/i3c/meson.build                            |    6 +
 hw/i3c/trace-events                           |   47 +
 hw/meson.build                                |    1 +
 hw/misc/meson.build                           |    1 -
 hw/misc/trace-events                          |    6 -
 .../functional/arm/test_aspeed_ast2600_sdk.py |   12 +
 21 files changed, 3730 insertions(+), 407 deletions(-)
 create mode 100644 hw/i3c/trace.h
 rename include/hw/{misc => i3c}/aspeed_i3c.h (63%)
 create mode 100644 include/hw/i3c/dw-i3c.h
 create mode 100644 include/hw/i3c/i3c.h
 create mode 100644 include/hw/i3c/mock-i3c-target.h
 create mode 100644 hw/i3c/aspeed_i3c.c
 create mode 100644 hw/i3c/core.c
 create mode 100644 hw/i3c/dw-i3c.c
 create mode 100644 hw/i3c/mock-i3c-target.c
 delete mode 100644 hw/misc/aspeed_i3c.c
 create mode 100644 hw/i3c/Kconfig
 create mode 100644 hw/i3c/meson.build
 create mode 100644 hw/i3c/trace-events

-- 
2.43.0

Re: [PATCH v3 00/20] i3c: aspeed: Add I3C support

Posted by Cédric Le Goater 17 hours ago

On 2/6/26 04:19, Jamin Lin wrote:
> v1:
>    The initial patch series was based on work by Joe Komlodi <komlodi@google.com>.
> 
>    This series adds I3C bus support to QEMU and adds more functionality to the
>    Aspeed I3C controller.
> 
>    This implementation is a basic implementation that introduces IBIs
>    (including hot-join), CCCs, and SDR data transfer. As-is, it doesn't support
>    multi-controller buses or HDR transfers.
> 
>    First we add the I3C bus and controller model. With that added we extend
>    the functionality of the Aspeed I3C controller so it can do transfers
>    and handle IBIs.
> 
>    Next, we add a mock I3C target. It's intended to be a very simple target
>    just to verify that I3C is working on the guest. Internally, we've used it
>    on Linux to verify that i3C devices can be probed and can send/receive data
>    and IBIs.
>    This target is sort of like an EEPROM, and it can also send IBIs upon
>    reception of a user-defined magic number.
> 
>    Lastly we add  hotplugging support. The hotplugging doesn't do anything too
>    complicated, it just adds the device attempting to hotplug to the bus. It
>    is the device's responsibility to hot-join and go through the DAA process
>    to participate on the bus.
> 
> v2:
>    Jamin Lin <jamin_lin@aspeedtech.com> has taken ownership of the I3C patch
>    series for upstream submission.
> 
>    Changes in this version include:
> 
>    1. Added I3C functional tests.
>    2. Updated patch 4 to refine register field definitions.
>    3. Updated patch 7 to correct read-only register field masks.
> 
> v3:
>    1. Add Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>

Sob is still missing.

C.



>    2. Fix a typo
>    3. Fix ASPEED mail server issue
> 
> Jamin Lin (1):
>    tests/functional/arm/test_aspeed_ast2600_sdk: Add i3c functional test
> 
> Joe Komlodi (19):
>    hw/misc/aspeed_i3c: Move to i3c directory
>    hw/i3c: Add bus support
>    hw/i3c: Split DesignWare I3C out of Aspeed I3C
>    hw/i3c/dw-i3c: Add more register fields
>    hw/i3c/aspeed_i3c: Add more register fields
>    hw/i3c/dw-i3c: Add more reset values
>    hw/i3c/aspeed_i3c: Add register RO field masks
>    hw/i3c/dw-i3c: Add register RO field masks
>    hw/i3c/dw-i3c: Treat more registers as read-as-zero
>    hw/i3c/dw-i3c: Use 32 bits on MMIO writes
>    hw/i3c/dw-i3c: Add IRQ MMIO behavior
>    hw/i3c/dw-i3c: Add data TX and RX
>    hw/i3c/dw-i3c: Add IBI handling
>    hw/i3c/dw-i3c: Add ctrl MMIO handling
>    hw/i3c/dw-i3c: Add controller resets
>    hw/i3c/aspeed: Add I3C bus get function
>    hw/i3c: Add Mock target
>    hw/arm/aspeed: Build with I3C_DEVICES
>    hw/i3c: Add hotplug support
> 
>   meson.build                                   |    1 +
>   hw/i3c/trace.h                                |    2 +
>   include/hw/arm/aspeed_soc.h                   |    2 +-
>   include/hw/{misc => i3c}/aspeed_i3c.h         |   22 +-
>   include/hw/i3c/dw-i3c.h                       |  201 ++
>   include/hw/i3c/i3c.h                          |  277 +++
>   include/hw/i3c/mock-i3c-target.h              |   52 +
>   hw/i3c/aspeed_i3c.c                           |  261 +++
>   hw/i3c/core.c                                 |  669 ++++++
>   hw/i3c/dw-i3c.c                               | 1864 +++++++++++++++++
>   hw/i3c/mock-i3c-target.c                      |  311 +++
>   hw/misc/aspeed_i3c.c                          |  383 ----
>   hw/Kconfig                                    |    1 +
>   hw/arm/Kconfig                                |    3 +
>   hw/i3c/Kconfig                                |   15 +
>   hw/i3c/meson.build                            |    6 +
>   hw/i3c/trace-events                           |   47 +
>   hw/meson.build                                |    1 +
>   hw/misc/meson.build                           |    1 -
>   hw/misc/trace-events                          |    6 -
>   .../functional/arm/test_aspeed_ast2600_sdk.py |   12 +
>   21 files changed, 3730 insertions(+), 407 deletions(-)
>   create mode 100644 hw/i3c/trace.h
>   rename include/hw/{misc => i3c}/aspeed_i3c.h (63%)
>   create mode 100644 include/hw/i3c/dw-i3c.h
>   create mode 100644 include/hw/i3c/i3c.h
>   create mode 100644 include/hw/i3c/mock-i3c-target.h
>   create mode 100644 hw/i3c/aspeed_i3c.c
>   create mode 100644 hw/i3c/core.c
>   create mode 100644 hw/i3c/dw-i3c.c
>   create mode 100644 hw/i3c/mock-i3c-target.c
>   delete mode 100644 hw/misc/aspeed_i3c.c
>   create mode 100644 hw/i3c/Kconfig
>   create mode 100644 hw/i3c/meson.build
>   create mode 100644 hw/i3c/trace-events
>

Re: [PATCH v3 00/20] i3c: aspeed: Add I3C support

Posted by Cédric Le Goater 18 hours ago

On 2/6/26 04:19, Jamin Lin wrote:
> v1:
>    The initial patch series was based on work by Joe Komlodi <komlodi@google.com>.
> 
>    This series adds I3C bus support to QEMU and adds more functionality to the
>    Aspeed I3C controller.
> 
>    This implementation is a basic implementation that introduces IBIs
>    (including hot-join), CCCs, and SDR data transfer. As-is, it doesn't support
>    multi-controller buses or HDR transfers.
> 
>    First we add the I3C bus and controller model. With that added we extend
>    the functionality of the Aspeed I3C controller so it can do transfers
>    and handle IBIs.
> 
>    Next, we add a mock I3C target. It's intended to be a very simple target
>    just to verify that I3C is working on the guest. Internally, we've used it
>    on Linux to verify that i3C devices can be probed and can send/receive data
>    and IBIs.
>    This target is sort of like an EEPROM, and it can also send IBIs upon
>    reception of a user-defined magic number.
> 
>    Lastly we add  hotplugging support. The hotplugging doesn't do anything too
>    complicated, it just adds the device attempting to hotplug to the bus. It
>    is the device's responsibility to hot-join and go through the DAA process
>    to participate on the bus.
> 
> v2:
>    Jamin Lin <jamin_lin@aspeedtech.com> has taken ownership of the I3C patch
>    series for upstream submission.
> 
>    Changes in this version include:
> 
>    1. Added I3C functional tests.
>    2. Updated patch 4 to refine register field definitions.
>    3. Updated patch 7 to correct read-only register field masks.
> 
> v3:
>    1. Add Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
>    2. Fix a typo
>    3. Fix ASPEED mail server issue

Looks good. I received the series correctly and b4 can fetch the patches.

Thanks for the time you all spent on these email issues ,

C.